tmp89fh42l TOSHIBA Semiconductor CORPORATION, tmp89fh42l Datasheet - Page 76

• Manufacturer Part Number: tmp89fh42l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.6
Software Interrupt (INTSW)
RA003
3.6
3.7
3.6.1
3.6.2
is the top-priority interrupt).
interrupt processing. INTUNDEF is accepted even if another non-maskable interrupt is in process. The current process
is discontinued and the INTUNDEF interrupt process starts soon after it is requested.
Software Interrupt (INTSW)
Undefined Instruction Interrupt (INTUNDEF)
Executing the SWI instruction generates a software interrupt and immediately starts interrupt processing (INTSW
Use the SWI instruction only for address error detection or for debugging described below.
When the CPU tries to fetch and execute an instruction that is not defined, INTUNDEF is generated and starts the
Note:The undefined instruction interrupt (INTUNDEF) forces the CPU to jump into the interrupt vector address, as
memory address. Code 0xFF is an SWI instruction, so a software interrupt is generated and an address error is
detected. The address error detection range can be further expanded by writing 0xFF to unused areas in the
program memory.
address.
Address error detection
Debugging
0xFF is read if for some cause such as noise the CPU attempts to fetch an instruction from a non-existent
Debugging efficiency can be increased by placing the SWI instruction at the software break point setting
software interrupt (SWI) does.
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