tmp89fh42l TOSHIBA Semiconductor CORPORATION, tmp89fh42l Datasheet - Page 353

no-image

tmp89fh42l

Manufacturer Part Number
tmp89fh42l
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tmp89fh42lUG(JZ)
Manufacturer:
LEVELONE
Quantity:
5 350
Part Number:
tmp89fh42lUG(JZ)
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
RA006
21.5.2.3
; #### Allocate BOOTROM to the data/code area ####
; #### Sector erase process (API) ####
; #### Write process ####
sLOOP1:
; #### End process ####
; #### Program to be executed in RAM ####
sRAMprogStart:
; Interrupt subroutine
sINTWDT:
sINTSWI:
sRAMprogEnd:
Note 1: It is not necessary to add DI instruction for above example program, because the support program include it.
How to set the security program by using a support program (API) of BOOTROM
1. Transfer the subroutine program of nonmaskable interrupt (INTSWI, INTWDT) to RAM.
2. Establish the nonmaskable interrupt vector in the RAM area.
3. After setting both SYSCR3<RAREA> and SYSCR3<RVCTR> to "1", set "0xD4" on SYSCR4.
However, the support program does not include EI instruction. Therefore, if interrupt process is used, enable IMF
after finishing all above process.
Then allocate RAM to the code area, and switch the vector area to the RAM area.
LD
LD
LD
LD
LD
LD
CALL
LD
LD
LD
LD
LD
LD
CALL
INC
INC
CMP
J
LD
LD
LD
LD
:
J
LD
LD
CMP
J
LD
RETN
NOP
(SYSCR3),0x06
(SYSCR4),0xD4
(FLSCR1),0x50
(FLSCR2),0xD5
A,0x0E
C,0xD5
(.BTEraseSec)
HL,0xE000
IY,0x0100
C,0x00
WA,HL
E,(IY)
(SP-),0xD5
(.BTWrite)
IY
HL
L,0x00
NZ,sLOOP1
(FLSCR1),0x40
(FLSCR2),0xD5
(SYSCR3),0x00
(SYSCR4),0xD4
:
XXXX
IX,0xF000
A,(IX)
A,(IX)
NZ,sINTWDT
(SYSCR2),0x10
Page 339
; Set RAREA and RVCTR to "1"
; Enable Code
; Set BAREA to "1" (note)
; Reflect the FLSCR1 setting
; Specify the area to be erased (0xE000 through 0xEFFF)
; Enable Code
; Execute sector erase
; Flash start address (address where data is written)
; RAM start address
; Address where data is written (bit 16)
; Address where data is written (bits 15 to 0)
; Data to be written
; Enable Code
; Write data to the flash memory (1 byte)
; Increment flash address
; Increment RAM address
; Finish 256-byte write?
; Return to sLOOP1 if the number of bytes is less than 256
; Set BAREA to "0"
; Set RAREA and RVCTR to "0"
; Enable Code
; Loop until the read values become the same
; Generate system clock reset
TMP89FH42L

Related parts for tmp89fh42l