tmp89fh42l TOSHIBA Semiconductor CORPORATION, tmp89fh42l Datasheet - Page 39

• Manufacturer Part Number: tmp89fh42l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RB000
and generated from the clock that is a quarter of the low-frequency clock (fs) in the SLOW1/2 or SLEEP0/1
mode. Therefore, the machine cycle time is 1/fcgck [s] in the NORMAL2 or IDLE2 mode and is 4/fs [s] in
the SLOW1/2 or SLEEP0/1 mode.
cannot be used as I/O ports in the dual-clock mode.)
in the dual-clock mode, allow the low-frequency clock to oscillate at the beginning of the program.
(1)
(2)
(3)
(4)
The main system clock (fm) is generated from the gear clock (fcgck) in the NORMAL2 or IDLE2 mode,
P02 (XTIN) and P03 (XTOUT) are used as the low-frequency clock oscillation circuit pins. (These pins
The operation of the TLCS-870/C1 Series becomes the single-clock mode after reset release. To operate it
using the gear clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
low-frequency clock (fs).
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
to NORMAL2.
peripheral circuits operate using the clock that is a quarter of the low-frequency clock (fs).
SLOW2 mode.
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
returns to the NORMAL2 mode after this mode is released.
In this mode, the CPU core operates using the gear clock (fcgck), and the peripheral circuits operate
In this mode, the CPU core and the peripheral circuits operate using the clock that is a quarter of the
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
Set SYSCR2<SYSCK> to switch the operation mode from NORMAL2 to SLOW2 or from SLOW2
In the SLOW2 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
In this mode, the high-frequency clock oscillation circuit stops operation and the CPU core and the
This mode requires less power to operate the high-frequency clock oscillation circuit than in the
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
Set SYSCR2<XEN> to switch the operation between the SLOW1 and SLOW2 modes.
In the SLOW1 or SLEEP1 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
In this mode, the CPU and the watchdog timer stop and the peripheral circuits operate using the gear
The IDLE2 mode can be activated and released in the same way as for the IDLE1 mode. The operation
NORMAL2 mode
SLOW2 mode
SLOW1 mode
IDLE2 mode
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TMP89FH42L