tmp89fh42l TOSHIBA Semiconductor CORPORATION, tmp89fh42l Datasheet - Page 296

• Manufacturer Part Number: tmp89fh42l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

18.4
Functions
RA002
18.4.4
18.4.4.1
Table 18-2 States of the SCL0 and SDA0 Pins in the Acknowledgment Mode
Serial clock
mode.
Master
Mode
Slave
SBI0CR1<SCK> is used to set the HIGH and LOW periods of the serial clock to be output in the master
Note:In the non-acknowledgment mode, the clocks for an acknowledge signal are not generated or counted,
Clock source
・ In the slave mode
and thus no acknowledge signal is output.
receiver during the period of the clocks for an acknowledge signal. In the receiver mode, the SDA0
pin is pulled down to the low level and an acknowledge signal is generated during the period of
the clocks for an acknowledge signal.
is detected or when a GENERAL CALL is received, the SDA0 pin is pulled down to the low level
and an acknowledge signal is generated during the period of the clocks for an acknowledge signal.
received in the transmitter mode, the SDA0 pin is released to receive an acknowledge signal from
the receiver during the period of the clocks for an acknowledge signal.
is generated. Table 18-2 shows the states of the SCL0 and SDA0 pins in the acknowledgment
mode.
SDA0
SDA0
SCL0
SCL0
In the transmitter mode, the SDA0 pin is released to receive an acknowledge signal from the
When a match between the received slave address and the slave address set to I2C0AR<SA>
During the data transfer after the slave address match is detected or a "GENERAL CALL" is
In the receiver mode, the SDA0 pin is pulled down to the low level and an acknowledge signal
Pin
When the slave address
match is detected or a
"GENERAL CALL" is re-
ceived
During transfer after the
slave address match is
detected or a "GENERAL
CALL" is received
SCK
000:
001:
010:
011:
100:
101:
110:
111:
Condition
-
-
-
t
HIGH
Page 282
(m/fcgck)
135
263
11
15
23
39
71
m
Add the clocks for an acknowl-
edge signal.
Release the pin to receive an
acknowledge signal
Count the clocks for an ac-
knowledge signal
Release the pin to receive an
acknowledge signal
9
Transmitter
-
t
LOW
(n/fcgck)
138
266
12
14
18
26
42
74
n
Add the clocks for an acknowl-
edge signal
Output the low level as an ac-
knowledge signal to the pin
Count the clocks for an ac-
knowledge signal
Output the low level as an ac-
knowledge signal to the pin
Output the low level as an ac-
knowledge signal to the pin
Receiver
TMP89FH42L