l4969 STMicroelectronics, l4969 Datasheet - Page 22

• Manufacturer Part Number: l4969
• Description: System Voltage Regulator With Fault Tolerant Low Speed Can-transceiver
• Manufacturer: STMicroelectronics

L4969
2.5
The Startup Watchdog is not programmable and will always generate a 1.0ms low cycle on NRESET followed
by a 320ms high cycle until an Acknowledgment will occur. If no Acknowldege is received after the 7th cycle,
the device will automatically be forced into Sleep mode.
Acknowledgment and Reset of Startup and Window Watchdog is automatically performed by overwriting
(or rewriting) this register.
Note, that with WDEN set, a cyclic setting of IFR.WKW after the programmed Wakeup time will occur.
2.5.1 Watchdog configuration:
22/34
State transition during oscillator calibration
Watchdog and Interrupt
has to be disabled
ADR4: WDC Watchdog Control Register
“No Request”
Note: WR, writing to this address, will restart the timer
Enable Wakeup Watchdog,
Window Watchdog will be
automatically deactivated
until wakeup watchdog expires
Reserved bits (‘RES’) have to be written as ‘0’.
WDEN
D7
CG=01
Disable
Window Watchdog,
only allowed with
PGEN set, see
previous table
for Osc adjust
Sleep
WND
Prog
Start time measurement
NRESET
forced low
externally
“2.5ms cycle
at rising edge
on NINT”
SWT1
Wakeup
Ack
POR
SWT0
Software Window Watchdog
timing configuration
00 : 2.5 - 5ms
01 : 5 - 10ms
10 : 10 - 20ms
11 : 20 - 40ms
Ack
CG=10
Window
Startup
Wd
ExtWake
Wd
WDT3
“Finish Cycle”
missing
Ack
Calculate
(after 350ms)
WR & WDEN
CAN-Wake
missing Ack
Offset
Timeout
WDT2
WR
Watchdog and Interrupt can be enabled
WDT1
CG=00
CG=11
Forced
Wakeup
Timer
Sleep
Wakeup Watchdog
timing configuration
Write offset
0000 : 80ms
0001 : 160ms
0010 : 320ms
0011 : 640ms
0100 : 800ms
1000 : 1sec
1001 : 2sec
1010 : 4sec
1011 : 8sec
1100 : 45min
WDT0
“Update ADJ”
D0