l4969 STMicroelectronics, l4969 Datasheet - Page 10

• Manufacturer Part Number: l4969
• Description: System Voltage Regulator With Fault Tolerant Low Speed Can-transceiver
• Manufacturer: STMicroelectronics

L4969
1.2
The following state-diagram illustrates the possible mode transitions inside the device.
As a prerequisite, a SPI-connection to the uC with the correct CRC-algorythms is required.
During the debug phase the NRES line can be forced high externally (connect to V1) to deactivate the startup
failure mechanis keeping V1 will alive.
10/34
After POR, V1 up or externally forced reset
through low NRES, the STARTUP STATE is
entered
NRES Low
WAKEUP
WAKEUP
&V1_UV
WAKEUP&V1_UV
Power-Up, Initialization and Sleep mode transitions
Writing to the WDC-
register
the NORMAL STATE is
entered.
DISAR
SET
WDC-ACK
V1 Low
(WDC-ACK)
WAKEUP
WND SET
NORMAL MODE
NORMAL MODE
V2, V3, CAN off
WINDOW WDC
WINDOW WDC
Programmed
STARTUP
DISABLED
No Reset
V1 active
ACTIVE
SLEEP
V1 OFF
If during the last WDC-ACK WND has been set (after releasing
write lock, see description of Watchdog Control Register) the Win-
dow watchdog is deactivated, and no uC supervision is active.
DISAR
Dependig on the value from the last
WDC-ACK, another one has to be
written within the specified time frame
(SWDC[1:0]). A failure will activate
the STARTUP STATE
SET
A missing ACK within 320ms will
initiate a STARTUP FAILURE
phase (RESET low).
WDC-FAIL
WDC-ACK
t=320ms
Forcing NRES high externally, fail will not be incremented (Emulation)
t=t
WDC-OK
t=1ms
WIN2
Setting DISAR (see Voltage Regulator Control Register) Voltage regulator V1 is
turned off, and the output voltage is decreasing depending on the external load
and blocking capacitor.
Note, that during this transition no Reset will be generated (due to Debugmode).
Upon wakeup howewer NRES will be pulled low, if V1was below the programma-
ble reset threshold (V1_UV).
The forced sleep mode is left upon wakeup through either CAN or edge on
WAKE. Applying a permanent wakeup (i.e. both CAN-lines dominant) pre-
vents V1 from being turned off (can be used during System debugging)
WAKEUP
WATCHDOG
RESET low
STARTUP
REFRESH
WINDOW
FAILURE
(fail ++)
WDEN SET
TIMEOUT | WDC-ACK
TIMEOUT | WDC-ACK
WDC-ACK
WDEN SET
&
The Window supervision can temporarily be de-
activated for the time programmed during the
last WDC-ACK (WDT[3:0]). Upon rewriting
(WDC-ACK) or expiry of the timer, the NORMAL
STATE is reentered.
WDEN SET
fail = 7
If no WDC-ACK is received within
seven retrials the voltage regulator
V1 will be turned off by entering the
FORCED SLEEP state.
Here the timer can be used to
generate time events (i.e.
wakeup uC from stop)
WDC-ACK & WDEN)
WDC-ACK & WDEN)
FORCED SLEEP
(restart by double
(restart by double
ACTIVE
No Reset
TIMER
V1 off
ACTIVE
TIMER