mc68hc05j5ap Freescale Semiconductor, Inc, mc68hc05j5ap Datasheet - Page 12

• Manufacturer Part Number: mc68hc05j5ap
• Description: General Description The Mc68hc05j5a Is A Member Of The Low-cost High-performance M68hc05 Family Of 8-bit Microcontroller Units Mcus . The M68hc05 Family Is Based On The Customer-speci Ed Integrated Circuit Design Strategy. All Mcus In The Family
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
1.2
1.3
1-2
MASK OPTIONS
The following mask options are available on the MC68HC05J5A:
MCU STRUCTURE
Figure 1-1 shows the structure of MC68HC05J5A MCU.
STOP instruction convert to WAIT
External interrupt pins (IRQ, PA0-PA3)
Port A and Port B pull-down/pull-up resistors
PA0-PA3 external interrupt capability
Oscillator Delay Option (internal clock cycles)
Low Voltage Reset
COP Watchdog Timer
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14 Bidirectional I/O pins (10 I/O pins on 16-pin package)
– PA0-PA5, PB0, and PB3-PB5: with software programmable input pull-
– PB1, PB2, PA6 and PA7: open-drained I/O pins with software
– PA6, PA7, and PB1: with slow output falling transition feature
– PA7: with falling-edge interrupt capability
– PA0-PA3: with maskable rising-edge only or rising-edge and high
– 20-pin package: PB1 and PB2, each with 25mA current sink
– 16-pin package: PB1 with 50mA current sink capability
Computer Operation Properly (COP) Watchdog
Low Voltage Reset Circuit
Illegal Address Reset
20-pin PDIP, 20-pin SOIC, 16-pin PDIP, and 16-pin SOIC packages
down devices
programmable pull-up devices
level interrupt capability
capability
Freescale Semiconductor, Inc.
MASK
For More Information On This Product,
Go to: www.freescale.com
GENERAL DESCRIPTION
July 16, 1999
[Enabled] or [Disabled]
[Edge-triggered] or [Edge and level triggered]
[Enabled] or [Disabled]
[Enabled] or [Disabled]
[224] or [4064]
[Enabled] or [Disabled]
[Enabled] or [Disabled]
OPTION
MC68HC05J5A
REV 2.1