dsp56852 Freescale Semiconductor, Inc, dsp56852 Datasheet - Page 33

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dsp56852

Manufacturer Part Number
dsp56852
Description
56800e 16-bit Digital Signal Controllers Digital Signal Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.10 Synchronous Serial Interface (SSI) Timing
Operating Conditions: V
Freescale Semiconductor
STCK frequency
STCK period
STCK high time
STCK low time
Output clock rise/fall time
Delay from STCK high to STFS (bl) high - Master
Delay from STCK high to STFS (wl) high - Master
Delay from SRCK high to SRFS (bl) high - Master
Delay from SRCK high to SRFS (wl) high - Master
Delay from STCK high to STFS (bl) low - Master
Delay from STCK high to STFS (wl) low - Master
Delay from SRCK high to SRFS (bl) low - Master
Delay from SRCK high to SRFS (wl) low - Master
STCK high to STXD enable from high impedance - Master
STCK high to STXD valid - Master
STCK high to STXD not valid - Master
STCK high to STXD high impedance - Master
SRXD Setup time before SRCK low - Master
SRXD Hold time after SRCK low - Master
Synchronous Operation (in addition to standard internal clock parameters)
SRXD Setup time before STCK low - Master
SRXD Hold time after STCK low - Master
1. Master mode is internally generated clocks and frame syncs
3
SS
= V
Table 4-11 SSI Master Mode
SSIO
= V
Parameter
SSA
= 0V, V
DD
= 1.62-1.98V, V
56852 Technical Data, Rev. 8
4
4
4
4
4
4
4
4
DDIO
1
Switching Characteristics
= V
DDA
= 3.0–3.6V, T
Symbol
t
t
t
t
t
t
t
t
RFSWHM
TFSWHM
RFSWLM
RFSBHM
TFSWLM
t
TFSBHM
RFSBLM
TFSBLM
t
t
t
t
t
TXNVM
t
SCKW
TXHIM
t
SCKH
TXEM
TXVM
t
SCKL
t
t
THM
TSM
SM
HM
fs
A
= –40° to +120°C, C
66.7
33.4
33.4
Min
-1.0
-1.0
-1.0
-1.0
-0.1
-0.1
-0.1
Synchronous Serial Interface (SSI) Timing
0.1
0.1
-4
0
0
4
4
4
4
Typ
4
Max
L
-0.1
-0.1
-0.1
-0.1
15
1.0
1.0
0.1
0.1
< 50pF, f
1
1
0
0
2
Units
MHz
op
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
= 120MHz
33

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