dsp56852 Freescale Semiconductor, Inc, dsp56852 Datasheet - Page 12

• Manufacturer Part Number: dsp56852
• Description: 56800e 16-bit Digital Signal Controllers Digital Signal Controller
• Manufacturer: Freescale Semiconductor, Inc

12
Table 3-1. 56852 Signal and Package Information for the 81-pin MAPBGA (Continued)
Pin No.
D4
E3
B4
B2
A2
A3
B3
Signal Name
GPIOE0
GPIOE1
GPIOC0
GPIOC1
GPIOC2
GPIOC3
SRXD
STXD
SCLK
STCK
STFS
RXD
TXD
WR
SS
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Output(Z)
Output
Output
Input
Input
Input
Type
56852 Technical Data, Rev. 8
Bus Control–Write Enable (WR)— is asserted during external
memory write cycles. When WR is asserted low, pins D0–D15 become
outputs and the controller puts data on the bus. When WR is
deasserted high, the external data is latched inside the external device.
When WR is asserted, it qualifies the A0–A15 pins. WR can be
connected directly to the WE pin of a Static RAM.
SCI Receive Data (RXD)—This input receives byte-oriented serial data
and transfers it to the SCI receive shift register.
Port E GPIO (0)—A general purpose I/O pin.
SCI Transmit Data (TXD)—This signal transmits data from the SCI
transmit data register.
Port E GPIO (1)—A general purpose I/O pin.
Port C GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when
the SSI is not in use.
SSI Transmit Data (STXD)—This output pin transmits serial data from
the SSI Transmitter Shift Register.
Port C GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when
the SSI is not in use.
SSI Receive Data (SRXD)—This input pin receives serial data and
transfers the data to the SSI Receive Shift Register.
SPI Serial Clock (SCLK)—In Master mode, this pin serves as an
output, clocking slaved listeners. In Slave mode, this pin serves as the
data clock input.
Port C GPIO (2)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
SSI Serial Transfer Clock (STCK)—This bidirectional pin provides the
serial bit rate clock for the transmit section of the SSI. The clock signal
can be continuous or gated.
SPI Slave Select (SS)—In Master mode, this pin is used to arbitrate
multiple masters. In Slave mode, this pin is used to select the slave.
Port C GPIO (3)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
SSI Serial Transfer Frame Sync (STFS) —This bidirectional pin is
used to count the number of words in a frame while transmitting. A
programmable frame rate divider and a word length divider are used for
frame rate sync signal generation.
Description
Freescale Semiconductor