adsp-bf561wbbz-5a Analog Devices, Inc., adsp-bf561wbbz-5a Datasheet - Page 2

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adsp-bf561wbbz-5a

Manufacturer Part Number
adsp-bf561wbbz-5a
Description
Blackfin Embedded Symmetric Multi-processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-BF561
TABLE OF CONTENTS
General Description ................................................. 3
Pin Descriptions .................................................... 17
Specifications ........................................................ 20
Portable Low Power Architecture ............................. 3
Blackfin Processor Core .......................................... 3
Memory Architecture ............................................ 4
DMA Controllers .................................................. 8
Watchdog Timer .................................................. 8
Timers ............................................................... 9
Serial Ports (SPORTs) ............................................ 9
Serial Peripheral Interface (SPI) Port ......................... 9
UART Port .......................................................... 9
Programmable Flags (PFx) .................................... 10
Parallel Peripheral Interface ................................... 10
Dynamic Power Management ................................ 11
Voltage Regulation .............................................. 12
Clock Signals ..................................................... 13
Booting Modes ................................................... 14
Instruction Set Description ................................... 14
Development Tools ............................................. 15
Designing an Emulator-Compatible Processor Board .. 16
Related Documents ............................................. 16
Operating Conditions .......................................... 20
Electrical Characteristics ....................................... 20
Absolute Maximum Ratings .................................. 21
Package Information ........................................... 21
ESD Caution ...................................................... 21
Timing Specifications .......................................... 22
Voltage Regulator Layout Guidelines .................... 12
Clock and Reset Timing .................................... 23
Asynchronous Memory Read Cycle Timing ........... 24
Asynchronous Memory Write Cycle Timing .......... 25
SDRAM Interface Timing .................................. 26
External Port Bus Request and Grant Cycle Timing .. 27
Parallel Peripheral Interface Timing ..................... 28
Serial Ports ..................................................... 32
Serial Peripheral Interface (SPI) Port—
Serial Peripheral Interface (SPI) Port—
Universal Asynchronous Receiver Transmitter (UART)
Master Timing ............................................. 35
Slave Timing ............................................... 36
Port—Receive and Transmit Timing ................. 37
Rev. C | Page 2 of 64 | December 2007
256-Ball CSP_BGA (17 mm) Ball Assignment ............... 46
256-Ball CSP_BGA (12 mm) Ball Assignment ............... 51
297-Ball PBGA ball assignment .................................. 56
Outline Dimensions ................................................ 61
Ordering Guide ..................................................... 64
REVISION HISTORY
12/07—Changes from Rev. B to Rev. C
Changed Quantity of Memory DMAs in
Rewrote Text in
Deleted Text in
Changed Values in
Deleted Previous Table 12 and Changed Title of
(CCLK) Requirements—600 MHz Speed Grade Models ....22
Added Models to
4/07—Changes from Rev. A to Rev. B
5/06—Changes from Rev. 0 to Rev. A
1/05—Initial version
Output Drive Currents ......................................... 41
Power Dissipation ............................................... 42
Test Conditions .................................................. 42
Environmental Conditions .................................... 44
Programmable Flags Cycle Timing ....................... 38
Timer Cycle Timing .......................................... 39
JTAG Test and Emulation Port Timing .................. 40
Operating Conditions...........................20
Pin Descriptions.................................17
Ordering Guide ................................64
Electrical Characteristics...................20
Features ............. 1
Core Clock

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