kad5512p-21q72ep-i Intersil Corporation, kad5512p-21q72ep-i Datasheet - Page 11

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kad5512p-21q72ep-i

Manufacturer Part Number
kad5512p-21q72ep-i
Description
Low Power 12-bit, 250/210/170/125msps Adc
Manufacturer
Intersil Corporation
Datasheet
Pin Descriptions - 48QFN
NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection).
Exposed Paddle
1, 9, 13, 17, 47
PIN NUMBER
2-4, 11, 21, 22
5, 8, 12, 48
19, 29, 42
14, 15
20, 37
23, 24
25, 26
27, 28
31, 32
33, 34
35, 36
38, 39
40, 41
6, 7
10
16
18
30
43
44
45
46
CLKOUTN, CLKOUTP [NC, CLKOUT]
LVDS [LVCMOS] NAME
11
ORN, ORP [NC, OR]
D0N, D0P [NC, D0]
D1N, D1P [NC, D1]
D2N, D2P [NC, D2]
D3N, D3P [NC, D3]
D4N, D4P [NC, D4]
D5N, D5P [NC, D5]
CLKP, CLKN
VINN, VINP
RESETN
NAPSLP
RLVDS
OVDD
AVDD
OVSS
AVSS
SCLK
AVSS
SDIO
DNC
VCM
SDO
CSB
KAD5512P
1.8V Analog Supply
Do Not Connect
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Clock Input True, Complement
Tri-Level Power Control (Nap, Sleep modes)
Power On Reset (Active Low, see page 17)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0]
LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1]
LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2]
LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT]
LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3]
LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4]
LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5]
LVDS Over Range Complement, True [NC, LVCMOS Over Range]
SPI Serial Data Output (4.7kΩ pull-up to OVDD is required)
SPI Chip Select (active low)
SPI Clock
SPI Serial Data Input/Output
Analog Ground
LVDS [LVCMOS] FUNCTION
January 16, 2009
FN6807.1

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