stlc3040 STMicroelectronics, stlc3040 Datasheet - Page 3

• Manufacturer Part Number: stlc3040
• Description: Subscriber Line Interface Codec Filter, Cofislic
• Manufacturer: STMicroelectronics

STLC3040 PIN DESCRIPTION (continued)
43,42,
11,12
18,24 STR0,STR1
30,44 STR2,STR3
13,17 SIR0, SIR1
31,32
(*)
GCI
INTERFACE TO HV SLIC
I/O
MISCELLANEOUS FUNCTION
UNUSED
7, 8
40
41
10
28
15
19
25
26
39
38
29
36
35
14
16
20
21
22
23
37
N.
3
4
5
6
9
Type
AI
AO
AI/O
TS0,TS1,
VL1, VL2
IDL, IDM
IO1, IO2
Symbol
SEL24
VOUT
ACDC
VBIM
PDO
RDC
SIR2
CAP
RAC
CAC
FSC
DCL
EXT
REF
TS2
IDH
MR
DD
DU
O1
C1
C2
IL
IT
I1
Description
Analog Input
Analog Output
Analog Input/Output
Type (*)
AI/O
DI/O
AI/O
AI/O
AI/O
AI/O
DI/O
DI/O
DI/O
OD
DO
AO
AO
AO
DI
DI
DI
DI
DI
DI
DI
DI
DI
AI
AI
AI
AI
AI
AI
AI
Select Clock Frequency for GCI Interface 2MHz/4MHz not affecting the data rate
(2Mbit/s)
If SEL24 = 0, Clock Frequency = 2048KHz
If SEL24 = 1, Clock Frequency = 4096KHz
GCI Select Time Slot Identifier Pins
Frame Sync 8kHz GCI Interface
Master Data Clock GCI Interface
Data Down link GCI Interface
Data Up link GCI Interface (Open Drain Driver)
State Control Signal 1. Combination of C1 and C2 defines HV (L3000N, L3000S,
STLC3170) operating mode. Current sense for thermal indication.
State Control Signal 2. Combination of C1 and C2 defines HV (L3000N, L3000S,
STLC3170) operating mode.
Power down output. Proper bias current is provided to HV (L3000N, L3000S, STLC3170) by this
pin. When the current is 0 the HV (L3000N, L3000S, STLC3170) goes in Power Denial (high
impedance). Proper combinations of PDO with C1, C2 set additional operating modes for
STLC3170 High Voltage Interface.
Comparator Input. These are inputs of the comparator that senses the line voltage in
Power Denial allowing Off/Hook detection in this mode.
Longitudinal Line-Current input IL = (I
Transversal Line-Current input IT=(I
Battery image monitor.
Output feeding the line voltage (DC, AC, RING, TTX) through H.V. HV (L3000N,
L3000S, STLC3170).
Programmable GCI controlled I/O.
Digital output written via GCI.
Digital input read via GCI.
External Ring Sync. Input.
Master Reset Input. Active High. The STLC3040 is forced in Loop-open and internal
registers are preset to default values.
Identification Code Signals, M+L ternary digits
H most significant bit, L least significant bit.
Capacitor must be connected to this pin. Its value defines the Soft Battery Reversal slope.
AC-Synthesis Reference Resistor.
AC/DC Line Split. Scaled line-current output, DC feedback input.
Splitter Capacitor. Scaled AC line-current input.
DC-Synthesis Reference Resistor.
Reference Voltage Output. A resistor on this pin sets the internal reference current.
Reserved for testing, must be shorted to DGND.
Must be left open.
Can be left open
Type
DI
PS
DI/O
Description
Digital Input
Chip Power/Ground
Digital Input/Output
TIP
Description
TIP
+ I
- I
RING
RING
)/100.
)/100.
Type
DO
OD
Description
Digital Output
Open Drain Output
STLC3040
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