s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 288

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Differences Between 908EY16A and 908EY16
B.2.2 Serial Peripheral Interface Module (SPI)
The four pins associated with the SPI can be remapped to alternate assignments on PTB and PTC. The
alternated assignment is selected in the CONFIG3 register. The reset state of these bits maps the SPI
functions to the same pins as on the 908EY16.
B.2.3 Internal Clock Generator Module (ICG)
An option to allow the use of high frequency (8 – 32 MHz) crystals for the external oscillator has been
added. There is now a range select bit in the CONFIG3 register to select this high frequency range.
B.2.4 Keyboard Interface Module (KBI)
The ability to select whether a keyboard interrupt is triggered by a rising or falling edge has been added.
A reserved register has been replaced with the Keyboard Polarity register (KBIPR) at address $000C.
While the falling edge trigger was the only mode available on the 908EY16, with the 908EY16A you can
set either rising or falling edge and the reset state of the polarity bits will match the original state.
B.2.5 Analog-to-Digital Converter Module (ADC)
The original ADC module has been replaced with the improved ADC10 module. While the modules are
extremely similar, there are some differences that need to be evaluated for impact on existing software.
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The conversion complete (COCO) bit now functions slightly differently. COCO is now always a
read-only bit and will get set regardless of the state of the AIEN bit.
The divide-by-6 clock selection has been removed. (ADIV2 bit replaced by ADLPC)
The two left-justified modes for the ADC data format are no longer available.
A long sample time option has been added to conserve power at the expense of longer conversion
times. This option is selected using the new ADLSMP bit in the ADCLK register. (The bit location
was previously reserved.)
The ADC10 will now run in stop mode if the ACLKEN bit is set to enable the asynchronous clock
inside the ADC10 module. Utilizing stop mode for an ADC conversion gives the quietest operating
mode to get extremely accurate ADC readings. (The bit location now used by ACLKEN was
unimplemented — it always read as a 0 and writes to that location had no affect.)
The ADC10 conversion time is now anywhere from 21 ADC clock cycles to 44 ADC clock cycles
depending on ACLKEN. The original ADC module in the 908EY16 had a conversion time of 16 to
17 ADC clock cycles. The bits that control these clocking operations are in the ADCLK register.
These changes are shown in
908EY16A:
908EY16:
Address: $000C
Reset:
Figure B-3. Keyboard Interrupt Polarity Register (KBIPR)
0/NA
Bit 7
R
R
0
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
= Reserved
0/NA
R
6
0
Figure
0/NA
R
5
0
B-4.
KBIP4
R
4
0
KBIP3
R
3
0
KBIP2
R
2
0
KBIP1
R
1
0
Freescale Semiconductor
KBIP0
Bit 0
R
0