s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 70

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s908gr32ag3vfa

Manufacturer Part Number
s908gr32ag3vfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Analog-to-Digital Converter (ADC)
ADICLK — ADC Input Clock Select Bit
The ADC requires a clock rate of approximately 1 MHz for correct operation. If the selected clock source
is not fast enough, the ADC will generate incorrect conversions. See
MODE1 and MODE0 — Modes of Result Justification Bits
70
ADICLK selects either the bus clock or the oscillator output clock (CGMXCLK) as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK as the ADC clock source.
MODE1 and MODE0 select among four modes of operation. The manner in which the ADC conversion
results will be placed in the ADC data registers is controlled by these modes of operation. Reset returns
right-justified mode.
1 = Internal bus clock
0 = Oscillator output clock (CGMXCLK)
00 = 8-bit truncation mode
01 = Right justified mode
10 = Left justified mode
11 = Left justified signed data mode
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
f
ADIC
=
f
CGMXCLK
ADIV[2:0]
or bus frequency
≅ 1 MHz
20.10 5.0-Volt ADC
Freescale Semiconductor
Characteristics.

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