s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 138

• Manufacturer Part Number: s908gr32ag3vfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Input/Output (I/O) Ports
12.4 Port B
Port B is an 8-bit special-function port that shares all eight of its pins with the analog-to-digital converter
(ADC) module.
12.4.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port pins.
PTB7–PTB0 — Port B Data Bits
AD7–AD0 — Analog-to-Digital Input Bits
12.4.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
DDRB7–DDRB0 — Data Direction Register B Bits
138
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
AD7–AD0 are pins used for the input channels to the analog-to-digital converter module. The channel
select bits in the ADC status and control register define which port B pin will be used as an ADC input
and overrides any control from the port I/O logic by forcing that pin as the input to the analog circuitry.
These read/write bits control port B data direction. Reset clears DDRB7–DDRB0, configuring all port
B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Alternate Function:
Address:
Care must be taken when reading port B while applying analog voltages to
AD7–AD0 pins. If the appropriate ADC channel is not enabled, excessive
current drain may occur if analog voltages are applied to the PTBx/ADx pin,
while PTB is read as a digital input during the CPU read cycle. Those ports
not selected as analog input channels are considered digital I/O ports.
Reset:
Read:
Write:
Address:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Reset:
Read:
Write:
DDRB7
$0005
Bit 7
0
$0001
PTB7
Bit 7
AD7
Figure 12-7. Data Direction Register B (DDRB)
Figure 12-6. Port B Data Register (PTB)
DDRB6
6
0
PTB6
AD6
6
DDRB5
5
0
PTB5
AD5
5
NOTE
DDRB4
4
0
Unaffected by reset
PTB4
AD4
4
DDRB3
3
0
PTB3
AD3
3
DDRB2
2
0
PTB2
AD2
2
DDRB1
1
0
PTB1
AD1
1
Freescale Semiconductor
DDRB0
Bit 0
0
PTB0
Bit 0
AD0