LTC1196-1BC Linear Technology, LTC1196-1BC Datasheet - Page 16

• Manufacturer Part Number: LTC1196-1BC
• Description: 8-Bit/ SO-8/ 1MSPS ADCs with Auto-Shutdown Options
• Manufacturer: Linear Technology

LTC1196/LTC1198
Dummy Bits
The last 2 bits of the input word following the MUX
Address are dummy bits. Either bit can be a “logical
one” or a “logical zero.” These 2 bits allow the ADC 2.5
clocks to acquire the input signal after the channel
selection.
A/D Conversion Result
Both the LTC1196 and the LTC1198 have the A/D
conversion result appear on the D
bits (see Operating Sequence in Figures 1 and 2). Data
on the D
line. The D
rising CLK edge by the digital systems. Data on the D
line remains valid for a minimum time of t
5V) to allow the capture to occur (see Figure 3).
Unipolar Transfer Curve
The LTC1196/LTC1198 are permanently configured for
unipolar only. The input span and code assignment for
this conversion type are shown in the following figures.
A
16
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
PPLICATI
•
•
•
D
CLK
OUT
OUT
Figure 3. Voltage Waveform for D
t
dDO
OUT
line is updated on the rising edge of the CLK
and t
data should also be captured on the
O
hDO
Unipolar Transfer Curve
U
V
t
IH
hDO
t
dDO
S
I FOR ATIO
U
OUT
W
OUT
line after two null
Delay Time,
hDO
1196/98 TC03
U
(30ns at
V
V
1196/98 AI04
OH
OL
OUT
V
IN
Operation with D
The LTC1198 can be operated with D
together. This eliminates one of the lines required to
communicate to the digital systems. Data is transmitted in
both directions on a single wire. The pin of the digital
systems connected to this data line should be configurable
as either an input or an output. The LTC1198 will take
control of the data line and drive it low on the 5th falling
CLK edge after the start bit is received (see Figure 4).
Therefore the port line of the digital systems must be
switched to an input before this happens to avoid a
conflict.
REDUCING POWER CONSUMPTION
The LTC1196/LTC1198 can sample at up to a 1MHz rate,
drawing only 50mW from a 5V supply. Power consump-
tion can be reduced in two ways. Using a 3V supply lowers
the power consumption on both devices by a factor of five,
to 10mW. The LTC1198 can reduce power even further
because it shuts down whenever it is not converting.
Figure 5 shows the supply current versus sample rate for
the LTC1196 and LTC1198 on 3V and 5V. To achieve such
a low power consumption, especially for the LTC1198,
several things must be taken into consideration.
Shutdown (LTC1198)
Figure 2 shows the operating sequence of the LTC1198.
The converter draws power when the CS pin is low and
powers itself down when that pin is high. For lowest power
consumption in shutdown, the CS pin should be driven
with CMOS levels (0V to V
of the converter will not draw current.
OUTPUT CODE
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
•
•
•
IN
Unipolar Output Code
and D
INPUT VOLTAGE
V
V
REF
REF
1LSB
OUT
CC
0V
– 1LSB
– 2LSB
•
•
•
) so that the CS input buffer
Tied Together
INPUT VOLTAGE
(V
REF
4.9805V
4.9609V
0.0195V
IN
= 5.000V)
0V
•
•
•
and D
1196/98 AI05
OUT
tied