MT9042CP1 Zarlink Semiconductor, Inc., MT9042CP1 Datasheet - Page 11

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MT9042CP1

Manufacturer Part Number
MT9042CP1
Description
PLL, Dual Reference Frequency Selectable Digital PLL with Multiple Clock Outputs
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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MT9042C Measures of Performance
The following are some synchronizer performance
indicators and their corresponding definitions.
Intrinsic Jitter
Intrinsic
synchronizing circuit and is measured at its output.
It is measured by applying a reference signal with no
jitter to the input of the device, and measuring its
output jitter. Intrinsic jitter may also be measured
when the device is in a non-synchronizing mode,
such as free running or holdover, by measuring the
output jitter of the device. Intrinsic jitter is usually
measured with various bandlimiting filters depending
on the applicable standards.
Jitter Tolerance
Jitter tolerance is a measure of the ability of a PLL to
operate properly (i.e., remain in lock and or regain
lock in the presence of large jitter magnitudes at
various jitter frequencies) when jitter is applied to its
reference. The applied jitter magnitude and jitter
frequency depends on the applicable standards.
Jitter Transfer
Jitter transfer or jitter attenuation refers to the
magnitude of jitter at the output of a device for a
given amount of jitter at the input of the device. Input
jitter
frequencies, and output jitter is measured with
various
standards.
For the MT9042C, two internal elements determine
the jitter attenuation.
1.9Hz low pass loop filter and the phase slope
limiter.
phase slope to 5ns/125us. Therefore, if the input
signal exceeds this rate, such as for very large
amplitude low frequency input jitter, the maximum
output phase slope will be limited (i.e., attenuated) to
5ns/125us.
The MT9042C has eight outputs with three possible
input frequencies for a total of 24 possible jitter
transfer functions. However, the data sheet section
on AC Electrical Characteristics - Jitter Transfer
specifies transfer values for only three cases, 8kHz
to 8kHz, 1.544MHz to 1.544MHz and 2.048MHz to
2.048MHz. Since all outputs are derived from the
same signal, these transfer values apply to all
outputs.
is
The phase slope limiter limits the output
filters
jitter
applied
is
depending
the
at
This includes the internal
various
jitter
on
produced
amplitudes
the
applicable
by
and
the
It should be noted that 1UI at 1.544MHz is 644ns,
which is not equal to 1UI at 2.048MHz, which is
488ns. Consequently, a transfer value using different
input and output frequencies must be calculated in
common units (e.g., seconds) as shown in the
following example.
What is the T1 and E1 output jitter when the T1 input
jitter is 20UI (T1 UI Units) and the T1 to T1 jitter
attenuation is 18dB?
Using the above method, the jitter attenuation can be
calculated for all combinations of inputs and outputs
based on the three jitter transfer functions provided.
Note that the resulting jitter transfer functions for all
combinations of inputs (8kHz, 1.544MHz, 2.048MHz)
and
4.096MHz, 8.192MHz, 16.384MHz) for a given input
signal (jitter frequency and jitter amplitude) are the
same.
Since intrinsic jitter is always present,
attenuation will appear to be lower for small input
jitter signals than for large ones.
accurate jitter transfer function measurements are
usually made with large input jitter
75% of the specified maximum jitter tolerance).
Frequency Accuracy
Frequency accuracy is defined as the absolute
tolerance of an output clock signal when it is not
locked to an external reference, but is operating in a
free running mode. For the MT9042C, the Freerun
accuracy is equal to the Master Clock (OSCi)
accuracy.
OutputT1
OutputT1
OutputE1
OutputE1
outputs
=
=
=
=
InputT1
20
OutputT1
OutputT1
(8kHz,
×10
-------- -
20
×10
18
×
×
1.544MHz,
(
--------------------- -
(
------
=
20
(
(
-------------------
1UIT1
1UIE1
644ns
488ns
A
2.5UI T1
)
)
)
MT9042C
)
(
=
Consequently,
3.3UI T1
signals (e.g.,
)
2.048MHz,
(
)
jitter
11

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