LMX1600SLB National Semiconductor, LMX1600SLB Datasheet - Page 11

• Manufacturer Part Number: LMX1600SLB
• Description: PLLatinum Low Cost Dual Frequency Synthesizer
• Manufacturer: National Semiconductor

2.0 Programming Description
(Continued)
2.5.1 Lock Detect Digital Filter
The Lock Detect Digital Filter compares the difference between the phase of the inputs of the phase detector to a RC generated
delay of approximately 15 ns. To enter the locked state (Lock = HIGH) the phase error must be less than the 15 ns RC delay for
4 consecutive reference cycles. Once in lock (Lock = HIGH), the RC delay is changed to approximately 30 ns. To exit the locked
state (Lock = LOW), the phase error must become greater than the 30 ns RC delay. When the PLL is in the powerdown mode,
Lock is forced LOW. A flow chart of the digital filter is shown below.
DS100129-16
2.5.2 Typical Lock Detect Timing (AUX_PD_POL/MAIN_PD_POL = 1)
DS100129-17
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