ISL1219 Intersil Corporation, ISL1219 Datasheet - Page 18

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ISL1219

Manufacturer Part Number
ISL1219
Description
Real Time Clock/Calendar
Manufacturer
Intersil Corporation
Datasheet

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Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (See
Figure 14). On power up of the ISL1219, the SDA pin is in
the input mode.
All I
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL1219 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met (See
Figure 14). A START condition is ignored during the
power-up sequence.
All I
condition, which is a LOW to HIGH transition of SDA while
2
2
C interface operations must begin with a START
C interface operations must be terminated by a STOP
SDA OUTPUT FROM
SDA OUTPUT FROM
TRANSMITTER
SCL FROM
RECEIVER
SDA
SCL
MASTER
SIGNALS FROM
SIGNAL AT SDA
SIGNALS FROM
THE MASTER
THE ISL1219
18
START
FIGURE 14. VALID DATA CHANGES, START, AND STOP CONDITIONS
START
FIGURE 15. ACKNOWLEDGE RESPONSE FROM RECEIVER
HIGH IMPEDANCE
A
R
S
T
T
1
FIGURE 16. BYTE WRITE SEQUENCE
IDENTIFICATION
1
1
0
BYTE
1
STABLE
1 1 1
DATA
ISL1219
WRITE
0
A
C
K
CHANGE
DATA
0 0 0 0
ADDRESS
SCL is HIGH (See Figure 14). A STOP condition at the end
of a read operation or at the end of a write operation to
memory only places the device in its standby mode.
An acknowledge (ACK) is a software convention used to
indicate a successful data transfer. The transmitting device,
either master or slave, releases the SDA bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data (See Figure 15).
The ISL1219 responds with an ACK after recognition of a
START condition followed by a valid Identification Byte, and
once again after successful receipt of an Address Byte. The
ISL1219 also responds with an ACK after receiving a Data
Byte of a write operation. The master must respond with an
ACK after receiving a Data Byte of a read operation.
BYTE
STABLE
DATA
8
A
C
K
DATA
BYTE
HIGH IMPEDANCE
STOP
ACK
9
A
C
K
S
O
P
T
August 14, 2006
FN6314.1

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