FIDO1100PQF208IR1 Innovasic Semiconductor Inc., FIDO1100PQF208IR1 Datasheet - Page 72

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FIDO1100PQF208IR1

Manufacturer Part Number
FIDO1100PQF208IR1
Description
32-bit Real-time Communications Controller
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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Part Number:
FIDO1100PQF208IR1
Manufacturer:
Innovasic Semiconductor
Quantity:
10 000
Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
10.
The TAP controller is a synchronous Finite State Machine and responds to changes in the TMS
and TCK signals. States transition occurs on the rising edge of TCK. Values shown to the side
of each state represent the state of TMS at the time of the rising edge of TCK (see Figure 33).
There are two paths through the state machine. The instruction path captures and loads the
JTAG instructions into the instruction register. The data path captures and loads data into the
other three registers. The TAP controller executes the last instruction decode until a new
instruction is entered at the Update-IR state or until a reset is sent to the controller.
The JTAG port has four Read/Write registers. An ID register, By-Pass Register, Boundary Scan,
and Instruction Register (see Figure 34).
The TDO pin remains in the high impedance state except during a shift-DR or shift-IR controller
state. In the shift-DR and shift-IR controller states, TDO is updated on the falling edge of TCK.
TMS and TDI are sampled on the rising edge of TCK.
JTAG
1
0
Test-Logic-Reset
Run-Test/Idle
®
0
1
Figure 33. JTAG State Machine
1
0
0
Select-DR-Scan
UNCONTROLLED WHEN PRINTED OR COPIED
Capture-DR
Update-DR
Pause-DR
Exit2-DR
Shift-DR
Exit1-DR
1
1
1
1
0
0
0
Page 72 of 81
IA211080807-06
0
0
1 1
1
1
1
0
0
Select-IR-Scan
Capture-IR
Update-IR
Pause-IR
Exit2-IR
Shift-IR
Exit1-IR
1
1
1
0
0
0
November 20, 2009
http://www.Innovasic.com
Customer Support:
0
0
1
Data Sheet
1-888-824-4184

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