FIDO1100PQF208IR1 Innovasic Semiconductor Inc., FIDO1100PQF208IR1 Datasheet - Page 55

• Manufacturer Part Number: FIDO1100PQF208IR1
• Description: 32-bit Real-time Communications Controller
• Manufacturer: Innovasic Semiconductor Inc.

Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
8.
8.1
8.1.1 Overview
The fido1100 interfaces to external memory and peripherals through a set of programmable chip-
select and bus-timing registers. It also has a built-in SDRAM controller to interface to SDRAM.
This chapter provides timing diagrams for hardware considerations.
For definitions of registers that control external bus timing and the SDRAM timing, please see
The fido1100 User Guide.
The external address bus of the fido1100 is 31-bit, and the external data bus is configurable to
support either an 8- or 16-bit bus. In this section, timing diagrams are provided for the
following:
8.2
All timing delays are characterized at the 50% to 50% point. This includes propagation delay
times through combinatorial functions as well as setup, hold time, and release-time definitions
for sequential elements (see
Signals
External Bus Operation
General Setup and Hold Timing
External Bus Timing
–
–
–
–
SDRAM Timing
–
–
–
–
–
General Setup and Hold Timing
32-bit transfer without external ready (RDY_N)
32-bit transfer with external ready (RDY_N)
8-bit/16-bit single cycle without external ready (RDY_N)
8-bit/16-bit cycle with external ready (RDY_N)
SDRAM CAS Timing
SDRAM Row Activation Timing
SDRAM Read Operation Timing
SDRAM Read Burst Timing
SDRAM Write Operation, Write Burst, Write-to-Write Operation, and Write-to-
Precharge Timing
®
Chapter 9, Setup and Hold
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Timing, for diagrams).
November 20, 2009
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