PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 83

• Manufacturer Part Number: PM4328-PI
• Description: Framer, T1|E1|T3 Standard Format, 324-BGA
• Manufacturer: PMC-Sierra, Inc.

STANDARD PRODUCT
DATASHEET
PMC-2011596
9.17 T1 Automatic Performance Report Generation (APRM)
PROPRIETARY AND CONFIDENTIAL
flag, or just a flag (if CRC insertion has not been enabled) is transmitted. The
TDPR then returns to the transmission of flag characters until the next packet is
available for transmission. While working in this mode, the user must only be
careful to avoid overfilling the FIFO; underruns cannot occur unless the packet is
greater than 128 bytes long. The TDPR will force transmission if the FIFO is
filled up regardless of whether or not the packet has been completely written into
the FIFO.
The second procedure transmits data only when the FIFO depth has reached a
user configured upper threshold. The TDPR will continue to transmit data until
the FIFO depth has fallen below the upper threshold and the transmission of the
last packet with data above the upper threshold has completed. In this mode,
the user must be careful to avoid overruns and underruns. An interrupt can be
generated once the FIFO depth has fallen below a user configured lower
threshold as an indicator for the user to write more data.
Interrupts can also be generated if the FIFO underflows while transmitting a
packet, when the FIFO falls below a lower threshold, when the FIFO is full, or if
the FIFO is overrun.
If there are more than five consecutive ones in the raw transmit data or in the
CRC data, a zero is stuffed into the serial data output. This prevents the
unintentional transmission of flag or abort sequences.
Abort characters can be continuously transmitted at any time by setting the ABT
bit in the TDPR Configuration register. During packet transmission, an underrun
situation can occur if data is not written to the TDPR Transmit Data register
before the previous byte has been depleted. In this case, an abort sequence is
transmitted, and the controlling processor is notified via the UDRI interrupt.
In compliance with the ANSI T1.231, T1.403 and T1.408 standards, a
performance report is generated each second for T1 ESF applications. The
report conforms to the HDLC protocol and is inserted into the ESF facility data
link.
The performance report can only be transmitted if the TDPR is configured to
insert the ESF Facility Data Link and the PREN bit of the TDPR Configuration
register is logic 1. The performance report takes precedence over incompletely
written packets, but it does not pre-empt packets already being transmitted.
See the Operation section for details on the performance report encoding.
ISSUE 1
70
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3