PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 173
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PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
SBI Link Rate Information
The TECT3 SBI bus provides a method for carrying link rate information between
devices. This is optional on a per channel basis. Two methods are specified, one
for T1 channels and the second for DS3 channels. These methods use the
reference 19.44MHz SBI clock and the SC1FP frame synchronization signal to
measure channel clock ticks and clock phase for transport across the bus.
The T1 method allows for a count of the number of T1 rising clock edges
between 2 KHz SC1FP frame pulses. This count is encoded in ClkRate[1:0] to
indicate that the nominal number of clocks, one more than nominal or one less
than nominal should be generated during the SC1FP period. This method also
counts the number of 19.44MHz clock rising edges after sampling SC1FP high to
the next rising edge of the T1 clock, giving the ability to control the phase of the
generated clock. The link rate information passed across the SBI bus via the V4
octet and is shown in Table 13. Table 14 shows the encoding of the clock count,
ClkRate[1:0], passed in the link rate octet.
Table 13: SBI T1 Link Rate Information
Table 14: SBI T1 Clock Rate Encoding
SC1FP
SREFCLK
T1/E1 CLK
Link Rate Octet
T1/E1 Format
“00” – Nominal
“01” – Fast
ClkRate[1:0]
ISSUE 1
ß
T1 Clocks / 2KHz
Bit #
772
773
ALM
7
Clock Count
· · ·
· · ·
· · ·
160
6
0
ClkRate[1:0]
5:4
à
HIGH DENSITY T1/E1 FRAMER
Phase[3:0]
AND M13 MULTIPLEXER
ß
3:0
PM4328 TECT3
Phase
à
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