PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 21
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PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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PM4328-PI
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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
M23 Multiplexer Section:
· Multiplexes 7 DS2 bit streams into a single M23 format DS3 bit stream.
· Performs required bit stuffing/destuffing including generation and
· Includes required FIFO buffers for rate adaptation in the multiplex path.
· Allows insertion and detection of per DS2 payload loopback requests
· Internally generates DS2 clock for use in integrated M13 or C-bit parity
· Allows per DS2 alarm indication signal (AIS) to be activated or cleared for
· Allows DS2 alarm indication signal (AIS) to be activated or cleared in the
· Supports C-bit parity DS3 format.
DS2 Framer Section:
· Frames to a DS2 (ANSI T1.107 section 8) signal with a maximum average
· Detects the DS2 alarm indication signal (AIS) in 9.9 ms in the presence of a
· Extracts the DS2 X-bit remote alarm indication (RAI) bit and indicates far end
· Accumulates up to 255 DS2 M-bit or F-bit error events per second.
repeating pattern up to 32 bits. The test pattern can be framed or unframed.
Diagnostic abilities include single bit error insertion or error insertion at bit
error rates ranging from 10 -1 to 10 -7 .
interpretation of C-bits.
encoded in the C-bits to be activated under microprocessor control.
multiplex applications. Alternatively accepts external DS2 clock reference.
either direction under microprocessor control.
demultiplex direction automatically upon loss of DS3 frame alignment or
signal.
reframe time of less than 7 ms (as required by TR-TSY-000009 Section 4.1.2
and TR-TSY-000191 Section 5.2).
10 -3 bit error rate.
receive failure (FERF).
ISSUE 1
8
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
PM4328 TECT3
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