PM4328-PI PMC-Sierra, Inc., PM4328-PI Datasheet - Page 234
![no-image](/images/no-image-200.jpg)
PM4328-PI
Manufacturer Part Number
PM4328-PI
Description
Framer, T1|E1|T3 Standard Format, 324-BGA
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM4328-PI.pdf
(250 pages)
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PM4328-PI
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STANDARD PRODUCT
DATASHEET
PMC-2011596
PROPRIETARY AND CONFIDENTIAL
Table 40: Egress Interface Timing - Clock Slave: EFP Enabled Mode (Figure
90)
Figure 90: Egress Interface Timing - Clock Slave: EFP Enabled Mode
Symbol
t1 CECLK
t0 CECLK
t1 CECLK
t0 CECLK
tS CECLK
tH CECLK
tP EFP1
Description
Common Egress Clock
Frequency
130 ppm or 2.048 MHz ± 130 ppm for
T1 modes and 2.048 MHz ±50ppm
for E1 modes)
Common Egress High Pulse Width
(XCLK = 37.056 MHz)
Common Egress Low Pulse Width
(XCLK = 37.056 MHz)
Common Egress High Pulse Width
(XCLK = 49.152 MHz)
Common Egress Low Pulse Width
(XCLK = 49.152 MHz)
CECLK to Input Set-up Time
CECLK to Input Hold Time
CECLK to EFP[x] Propagation
delay
ISSUE 1
CECLK
EFP[x]
9,10,11
CEFP
ED[x]
1,2
(Typically 1.544 MHz ±
tP
EFP1
t0
CECLK
tS
CECLK
Valid
221
Valid
tH
CECLK
t1
8,9
CECLK
7,9
2,4
2,4
2,4
2,4
1.5
167
167
145
145
20
20
5
Min
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
Max
2.1
100
PM4328 TECT3
Units
MHz
ns
ns
ns
ns
ns
ns
ns
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