ST72324LS4 STMicroelectronics, ST72324LS4 Datasheet - Page 115
ST72324LS4
Manufacturer Part Number
ST72324LS4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST72324LK2.pdf
(154 pages)
Specifications of ST72324LS4
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
16-bit Timer A With
1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
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SUPPLY CURRENT CHARACTERISTICS (Cont’d)
12.4.2 Supply and Clock Managers
The previous current consumption specified for the ST7 functional operating modes over temperature
range does not take into account the clock source current consumption. To get the total device consump-
tion, the two current values must be added (except for HALT mode).
Notes:
1. Data based on characterization results, not tested in production.
2. Data based on characterization results done with the external components specified in
production.
3. As the oscillator is based on a current source, the consumption does not depend on the voltage.
12.4.3 On-Chip Peripherals
T
Notes:
1. Data based on a differential I
2. Data based on a differential I
3. Data based on a differential I
I
A
DD(RCINT)
Symbol
I
I
DD(RES)
counter stopped (only TIMD bit set). Data valid for one timer.
communication at maximum speed (data sent equal to 55h). This measurement includes the pad toggling consump-
tion.
DD(PLL)
Symbol
I
I
I
DD(ADC)
= 25°C f
DD(TIM)
DD(SPI)
Supply current of internal RC oscillator
Supply current of resonator oscillator
PLL supply current
CPU
16-bit Timer supply current
SPI supply current
ADC supply current when converting
=4MHz.
Parameter
DD
DD
DD
measurement between reset configuration (SPI disabled) and a permanent SPI master
2)
measurement between reset configuration (timer counter running at f
measurement between reset configuration and continuous A/D conversions.
Parameter
1)
2) & 3)
3)
Conditions
V
DD
=3.3V
Conditions
Section 12.5.3
12.5.3 on page
Typ
625
180
see
117
Section
Typ
250
300
20
ST72324Lxx
Max
CPU
, not tested in
/4) and timer
1)
115/154
Unit
µA
Unit
µA
µA
1
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