ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 112

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

Serial peripheral interface (SPI)
17.7.3
Note:
Caution:
112/171
1: Slave deselected
Data I/O register (SPIDR)
Read/Write
Reset Value: Undefined
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
A write to the SPIDR register places data directly into the shift register for transmission.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see
Table 49.
0031h
0032h
0033h
Address
(Hex.)
D7
7
SPIDR
Reset
Value
SPICR
Reset
Value
SPICSR
Reset
Value
Register
SPI register map and reset values
label
D6
Figure
MSB
x
SPIE
0
SPIF
0
7
D5
45).
x
SPE
0
WCOL
0
6
D4
x
SPR2
0
OVR
0
5
MODF
MSTR
D3
4
x
0
0
CPOL
3
x
x
0
D2
CPHA
SOD
2
0
x
x
D1
SPR1
SSM
1
x
x
0
ST7DALIF2
D0
SPR0
0
LSB
SSI
0
0
x
x