AD6654 Analog Devices, AD6654 Datasheet - Page 44

• Manufacturer Part Number: AD6654
• Description: 14-Bit, 92.16 MSPS, 4 & 6-Channel Wideband IF to Base Band Receiver
• Manufacturer: Analog Devices

Specifications of AD6654

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 92.16MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Adc Architecture: Subranging
• Pkg Type: BGA,CSP

AD6654
PROGRAMMING DRCF REGISTERS FOR
AN ASYMMETRICAL FILTER
To program the DRCF registers for an asymmetrical filter:
1.
2.
3.
4.
5.
6.
Note that each write or read access increments the internal
RAM address. Therefore, all coefficients should be read first
before reading them back. Also, for debugging purposes, each
RAM address can be written individually by making the start
and stop addresses the same. Therefore, to program one RAM
location, the user writes the address of the RAM location to
both the start and stop address registers, and then writes the
coefficient memory register.
Write NTAPS – 1 in the DRCF taps register, where
NTAPS is the number of filter taps. The absolute
maximum value for NTAPS is 64 in asymmetrical filter
mode.
Write 0 for the DRCF coefficient offset register.
Write 0 for the symmetrical filter bit in the DRCF control
register.
Write the start address for the coefficient RAM, typically
equal to the coefficient offset register in the DRCF start
address register.
In the DRCF stop address register, write the stop address
for the coefficient RAM, typically equal to the following:
Write all coefficients in reverse order (start with last
coefficient) to the DRCF coefficient memory register. If in
8-bit microport mode or serial port mode, write the lower
byte of the memory register first and then the higher byte.
After each write access to the DRCF coefficient memory
register, the internal RAM address is incremented starting
with the start address and ending with the stop address.
Coefficient Offset + NTAPS − 1
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PROGRAMMING DRCF REGISTERS FOR A
SYMMETRIC FILTER
To program the DRCF registers for a symmetrical filter:
1.
2.
3.
4.
5.
6.
Note that each write or read access increments the internal
RAM address. Therefore, all coefficients should be read first
before reading them back. Also, for debugging purposes, each
RAM address can be written individually by making the start
and stop addresses the same. Therefore, to program one RAM
location, the user writes the address of the RAM location to
both the start and stop address registers, and then writes the
coefficient memory register.
Write NTAPS – 1 in the DRCF taps register, where
NTAPS is the number of filter taps. The absolute
maximum value for NTAPS is 128 in symmetric filter
mode.
Write ceil (64 – NTAPS/2) for the DRCF coefficient offset
register, where the ceil function takes the closest integer
greater than or equal to the argument.
Write 1 for the symmetrical filter bit in the DRCF control
register.
Write the start address for the coefficient RAM, typically
equal to coefficient offset register, in the DRCF start
address register.
Write the stop address for the coefficient RAM, typically
equal to ceil (NTAPS/2) – 1, in the DRCF stop address
register.
Write all coefficients to the DRCF coefficient memory
register, starting with the middle of the filter and working
towards the end of the filter. When coefficients are
numbered 0 to NTAPS – 1, the middle coefficient is given
by the coefficient number ceil (NTAPS/2). If in 8-bit
microport mode or serial port mode, write the lower byte
of the memory register first and then the higher byte.
After each write access to the DRCF coefficient memory
register, the internal RAM address is incremented starting
with the start address and ending with the stop address.