AD7829-1 Analog Devices, AD7829-1 Datasheet - Page 14

• Manufacturer Part Number: AD7829-1
• Description: 3 V/5 V, 2 MSPS, 8-Bit, 8-Channel ADC
• Manufacturer: Analog Devices

Specifications of AD7829-1

• Resolution (bits): 8bit
• # Chan: 8
• Sample Rate: 2MSPS
• Interface: Par
• Analog Input Type: SE-Uni
• Ain Range: 2 V p-p,2.5V p-p,Uni 2.0V,Uni 2.5V
• Adc Architecture: Flash
• Pkg Type: SOIC,SOP

AD7829-1
POWER-UP TIMES
The AD7829-1 has a 1 μs power-up time when using an
external reference and a 25 μs power-up time when using the
on-chip reference. When V
is in a low current mode of operation. Ensure that the
line is not floating when V
CONVST while V
before V
In order to carry out a conversion, the AD7829-1 must first be
powered up.
The AD7829-1 is powered up by a rising edge on the
pin. A conversion is initiated on the falling edge of CONVST .
Figure 17 shows how to power up the AD7829-1 when V
first connected or after the AD7829-1 has been powered down
using the CONVST pin when using either the on-chip reference
or an external reference. When using an external reference, the
falling edge of CONVST may occur before the required power-
up time has elapsed. However, the conversion is not initiated on
the falling edge of CONVST but rather at the moment when the
part has completely powered up, that is, after 1 μs.
CONVST
CONVST
V
V
DD
DD
50
48
46
44
42
40
38
0.2
DD
Figure 16. SNR vs. Input Frequency on the AD7829-1
has fully settled and may enter an unknown state.
1
t
t
POWER-UP
Figure 17. AD7829-1 Power-Up Time
POWER-UP
25µs
DD
1µs
is rising, the part attempts to power up
EXTERNAL REFERENCE
INITIATED HERE
ON-CHIP REFERENCE
INITIATED HERE
3
CONVERSION
INPUT FREQUENCY (MHz)
CONVERSION
DD
DD
4
is applied. If there is a glitch on
is first connected, the AD7829-1
5
f
SAMPLE
6
= 2MHz
8
CONVST
CONVST
1
0
DD
is
Rev. 0 | Page 14 of 20
If the falling edge of
up time has elapsed, then it is upon this falling edge that a
conversion is initiated. When using the on-chip reference, it is
necessary to wait the required power-up time of approximately
25 μs before initiating a conversion. That is, a falling edge on
CONVST must not occur before the required power-up time
has elapsed, when V
has been powered down using the CONVST pin, as shown in
Figure 17.
POWER VS. THROUGHPUT
Superior power performance can be achieved by using the
automatic power-down (Mode 2) at the end of a conversion
(see the
Figure 18 shows how the automatic power-down is implemented
using the CONVST signal to achieve the optimum power perform-
ance for the AD7829-1. The duration of the
set to be equal to or less than the power-up time of the devices
(see the
reduced, the device remains in its power-down state longer, and the
average power consumption over time drops accordingly.
For example, if the AD7829-1 is operated in a continuous
sampling mode, with a throughput rate of 100 kSPS and using
an external reference, the power consumption is calculated as
follows. The power dissipation during normal operation is
36 mW, V
time is 330 ns (@ +25°C), the AD7829-1 can be said to dissipate
36 mW (maximum) for 1.33 μs during each conversion cycle.
If the throughput rate is 100 kSPS, the cycle time is 10 μs and
the average power dissipated during each cycle is (1.33/10) ×
(36 mW) = 4.79 mW. This calculation uses the minimum
conversion time, thus giving the best-case power dissipation at
this throughput rate. However, the actual power dissipated
during each conversion cycle may increase, depending on the
actual conversion time (up to a maximum of 420 ns).
CONVST
Operating Modes section).
Operating Modes section). As the throughput rate is
DD
t
POWER-UP
= 3 V. If the power-up time is 1 μs and the conversion
1µs
Figure 18. Automatic Power-Down
t
CONVERT
DD
330ns
CONVST
is first connected or after the AD7829-1
10µs @ 100kSPS
t
CYCLE
occurs after the required power-
POWER-DOWN
CONVST pulse is