AD7367 Analog Devices, AD7367 Datasheet - Page 18

• Manufacturer Part Number: AD7367
• Description: True Bipolar Input, Dual 14-Bit, 2-Channel, Simultaneous Sampling SAR ADC
• Manufacturer: Analog Devices

Specifications of AD7367

• Resolution (bits): 14bit
• # Chan: 4
• Sample Rate: 1MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
• Ain Range: Bip (Vref) x 2,Bip (Vref) x 4,Bip 10V,Bip 5.0V,Uni (Vref) x 4,Uni 10V
• Adc Architecture: SAR
• Pkg Type: SOP

AD7366/AD7367
Unlike other bipolar ADCs, the AD7366/AD7367 do not have a
resistive analog input structure. On the AD7366/AD7367, the
bipolar analog signal is sampled directly onto the sampling
capacitor. This gives the AD7366/AD7367 high analog input
impedance. The analog input impedance can be calculated from
the following formula:
where:
f
C
C
Inputs section). When operating at 1 MSPS, the analog input
impedance is typically 260 kΩ for the ±10 V range. As the
sampling frequency is reduced, the analog input impedance
further increases. As the analog input impedance increases, the
current required to drive the analog input therefore decreases
(see Figure 7 for more information).
S
S
S
is the sampling frequency.
is the sampling capacitor value.
depends on the analog input range chosen (see the Analog
Z = 1/(f
S
× C
S
)
+11.5V TO +16.5V
–16.5V TO –11.5V
ANALOG INPUTS ±10V,
±5V, AND 0V TO +10V
SUPPLY
SUPPLY
680nF
Figure 20. Typical Connection Diagram Using Internal Reference
+
680nF
+
+
10µF
10µF
+
+
0.1µF
+
V
V
V
V
D
D
0.1µF
A1
A2
B1
B2
CAP
CAP
Rev. D | Page 18 of 28
A
B
V
V
DD
SS
AD7366/
AD7367
DV
CC
AGND
RANGE0
RANGE1
REFSEL
AV
CNVST
V
D
D
DGND
ADDR
SCLK
BUSY
DRIVE
CC
OUT
OUT
TYPICAL CONNECTION DIAGRAM
Figure 20 shows a typical connection diagram for the AD7366/
AD7367. In this configuration, the AGND pin is connected
to the analog ground plane of the system, and the DGND pin
is connected to the digital ground plane of the system. The
analog inputs on the AD7366/AD7367 accept bipolar single-
ended signals. The AD7366/AD7367 can operate with either
an internal or an external reference. In Figure 20, the AD7366/
AD7367 are configured to operate with the internal 2.5 V reference.
A 680 nF decoupling capacitor is required when operating with
the internal reference.
The AV
The V
input structures. The voltage on these pins must be equal to or
greater than ±11.5 V (see Table 7 for more information). The
V
The voltage applied to the V
the serial interface. V
+
CS
0.1µF
DRIVE
A
B
+
0.1µF
0.1µF
DD
pin is connected to the supply voltage of the microprocessor.
CC
and V
V
and DV
DRIVE
+
+
10µF
10µF
SS
are the dual supplies for the high voltage analog
CC
+3V OR +5V SUPPLY
+
pins are connected to a 5 V supply voltage.
DRIVE
SERIAL
INTERFACE
+5V SUPPLY
can be set to 3 V or 5 V.
DRIVE
input controls the voltage of