MAX3140EEI+T Maxim Integrated Products, MAX3140EEI+T Datasheet - Page 22

• Manufacturer Part Number: MAX3140EEI+T
• Description: IC UART W/RS485 28-QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX3140EEI+T

• Features: Transceiver
• Fifo's: 8 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 4.75 V ~ 5.25 V
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes:
bit 15, 14: DIN
0, 0 = Read Data
bit 13–0: DIN
Zeros
bit 15: DOUT
R = 1, Data is available to be read from the receive register or
FIFO.
R = 0, Receive register and FIFO are empty.
bit 14: DOUT
T = 1, Transmit buffer is empty.
T = 0, Transmit buffer is full.
The baud-rate generator determines the rate at which
the transmitter and receiver operate. Bits B3–B0 in the
WRITE CONFIGURATION register determine the baud-
rate divisor (BRD), which divides the X1 oscillator
frequency. The on-board oscillator operates with either
a 1.8432MHz or a 3.6864MHz crystal, or is driven at X1
with a 45% to 55% duty-cycle square wave. Table 6
shows baud-rate divisors for given input codes, as well
as the baud rate for 1.8432MHz and 3.6864MHz crys-
tals. The generator’s clock is 16 times the baud rate.
Using the READ DATA or WRITE DATA register clears
the interrupt IRQ, assuming the conditions that initiated
the interrupt no longer exist. Table 7 gives the details
for each interrupt source. Figure 15 shows the function-
al diagram for the interrupt sources and mask blocks.
Two examples of setting up an IRQ for the MAX3140
are shown below.
Example 1: Setting up only the transmit buffer-empty
interrupt.
Send the 16-bit word below into DIN of the MAX3140
using the WRITE CONFIGURATION register. This 16-bit
word configures the MAX3140 for 9600bps, 8-bit words,
no parity, and one stop bit with a 1.8432MHz crystal.
binary 1100100000001010
HEX
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
Table 5. READ DATA Register Bit Assignment (D15, D14 = 0, 0)
22
DOUT
DIN
BIT
______________________________________________________________________________________
C80A
15
R
0
14
0
T
13
0
0
Interrupt Sources and Masks
12
0
0
Baud-Rate Generator
11
0
0
RA/FE
10
0
CTS
9
0
Pr
8
0
bit 13–11: DOUT
Zeros
bit 10: DOUT
RA/FE = Receive-activity (UART shutdown)/Framing-error
(normal operation) bit
bit 9: DOUT
CTS = CTS input state. If CTS = 0, then CTS = 1 and vice versa.
bit 8: DOUT
Pr = Received parity bit. This is only valid if PE = 1.
bit 7–0: DOUT
D7t–D0t = Received Data bits. D7r = 0 for L = 1.
Table 6. Baud-Rate Selection Table*
*Standard baud rates shown in bold
**Default baud rate
B3 B2 B1 B0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D7r
7
0
BAUD
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D6r
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
6
0
0**
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D5r
5
0
DIVISION
RATIO
128
192
384
16
32
64
12
24
48
96
1
2
4
8
3
6
D4r
4
0
D3r
1.8432MHz)
3
0
115.2k**
(f
BAUD
RATE
57.6k
38.4k
19.2k
28.8k
14.4k
7200
3600
1800
9600
4800
2400
1200
OSC
900
600
300
D2r
=
2
0
3.6864MHz)
D1r
1
0
230.4k**
(f
115.2k
BAUD
RATE
57.6k
38.4k
19.2k
28.8k
14.4k
76.8k
7200
3600
1800
9600
4800
2400
1200
OSC
600
D0r
=
0
0