SC16IS740IPW,112 NXP Semiconductors, SC16IS740IPW,112 Datasheet - Page 16

IC UART SINGLE W/FIFO 16-TSSOP

SC16IS740IPW,112

Manufacturer Part Number
SC16IS740IPW,112
Description
IC UART SINGLE W/FIFO 16-TSSOP
Manufacturer
NXP Semiconductors
Type
UART with 64-byte FIFOs and IrDA encoder/decoderr
Datasheet

Specifications of SC16IS740IPW,112

Number Of Channels
1, UART
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Supply Current
6 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3648-5
935280988112
SC16IS740IPW

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC16IS740IPW,112
Manufacturer:
JAMICON
Quantity:
101
NXP Semiconductors
SC16IS740_750_760_6
Product data sheet
7.5.1 Interrupt mode operation
7.5.2 Polled mode operation
In Interrupt mode (if any bit of IER[3:0] is 1) the host is informed of the status of the
receiver and transmitter by an interrupt signal, IRQ. Therefore, it is not necessary to
continuously poll the Line Status Register (LSR) to see if any interrupt needs to be
serviced.
In Polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the Line Status Register (LSR). This mode is an alternative to the FIFO
Interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU.
Polled mode operation.
Fig 12. Interrupt mode operation
Fig 13. FIFO Polled mode operation
Figure 12
HOST
HOST
shows Interrupt mode operation.
Single UART with I
Rev. 06 — 13 May 2008
read LSR
read IIR
IRQ
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
SC16IS740/750/760
THR
THR
LSR
IER
IER
IIR
Figure 13
1
0
1
0
RHR
RHR
1
002aab042
0
002aab043
1
0
© NXP B.V. 2008. All rights reserved.
shows FIFO
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