CN8237EBGB Mindspeed Technologies, CN8237EBGB Datasheet - Page 300

• Manufacturer Part Number: CN8237EBGB
• Description: ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8237EBGB

• Package: 456BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 622 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3.135 V

14.0 CN8237 Registers
14.3 Segmentation Registers
14-10
15–12
10–6
1–0
Bit
11
5
4
3
2
Field
Size
4
1
5
1
1
1
1
2
TX_FIFO_LEN
CLP0_EOM
OAM_STAT_ID
SEG_ST_HALT
Reserved
SEG_HS_DIS
TX_RND
TR_SIZE[1:0]
Name
Mindspeed Technologies
Depth of transmit FIFO buffer in cells. Valid range is 3–9. To ensure
optimum performance, the depth of the FIFO buffer should be at least
three.
Set CLP in ATM header to 0 on last cell of CPCS-PDU.
Status queue ID for buffer descriptors with OAM_STAT set.
Enables a status queue entry for a VCC halted with a partially segmented
packet.
Program and read as 0.
Segmentation Host Status Disable—Disable segmentation check for PCI
memory status queue full condition. If this bit is not set, the segmentation
coprocessor will not segment any cells for a VCC assigned to a full PCI
memory status queue. This bit can be used to disable overflow checking
when the queues are sized large enough to prevent overflow.
Set for transmit queue servicing in round-robin order.
Clear for transmit queue servicing in priority order (31 is highest priority).
Number of entries in each transmit queue.
00 = 64
01 = 256
10 = 1,024
11 = 4,096
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
™
Description
28237-DSH-001-C
CN8237