CN8237EBGB Mindspeed Technologies, CN8237EBGB Datasheet - Page 247

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CN8237EBGB

Manufacturer Part Number
CN8237EBGB
Description
ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of CN8237EBGB

Package
456BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
622 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3.135 V

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28237-DSH-001-C
10.0 Local Memory Interface
10.1 Overview
To simplify system implementations, the CN8237 integrates a complete memory
controller, designed for direct interface to local memory Zero Bus Turnaround
(ZBT) or syncburst synchronous SRAMs (each containing up to 4 MB of external
memory, 8 MB future expansion).
memory is selected. When MEMTYPE is a logic high, non-ZBT flowthrough
synchronous memory is selected. ZBT memory does not require a dead cycle
between a read cycle and a write cycle whereas non-ZBT synchronous SRAM
does.
its own local memory. One coprocessor is designated for segmentation
(transmitting), while the other coprocessor is designated for reassembly
(receiving).
the segmentation coprocessor has priority, followed by the reassembly
coprocessor, then the host. When multiple consumers try to access the reassembly
local memory, the reassembly coprocessor has priority followed by host.
implemented, as well as the number of VCCs that are currently active. Memory
requirements are discussed in
When CONFIG0 (MEMTYPE) is logic low, ZBT flowthrough synchronous
There are two coprocessors located inside the CN8237. Each coprocessor has
Each local memory interface is 32 bits wide and operates up to 66 MHz.
When the multiple consumers try to access the segmentation local memory,
The amount of memory required is heavily dependent on the number of VCCs
Mindspeed Technologies
100
Section
10.3.
10-1

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