ATA5824-PLQW 80 Atmel, ATA5824-PLQW 80 Datasheet - Page 30

• Manufacturer Part Number: ATA5824-PLQW 80
• Manufacturer: Atmel

Specifications of ATA5824-PLQW 80

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Operating Supply Voltage (typ): 5V
• Lead Free Status / Rohs Status: Compliant

Table 9-1.
9.1
Figure 9-3.
30
Frequency
433.92
(MHz)
315.0
868.3
Pin CLK
ATA5823/ATA5824
(Control Register 3)
(Control Register 3)
433_N868
Calculation of f
Clock Timing
AVCC
AVCC
Pin 6
GND
CLK_ON
CLK_EN
DVCC
CLK
CREG1
Bit(4)
The variable FREQ depends on the bit PLL_MODE in control register 1 and the parameter
FREQ2 and FREQ3, which are defined by the bits FR0 to FR12 in control register 2 and 3 and is
calculated as follows:
FREQ = FREQ2 + FREQ3
Care must be taken with the harmonics of the CLK output signal f
produced by an microprocessor clocked with it, since these harmonics can disturb the reception
of signals if they get to the RF input. In a single channel system the use of FREQ = 3803 to 4053
ensures that harmonics of this signal do not disturb the receive mode. In a multichannel system
the CLK signal can either be not used or carefully layouted on the application PCB. The supply
voltage of the microcontroller must also be carefully blocked in a multichannel system.
Pin CLK is an output to clock a connected microcontroller. The clock frequency f
as follows:
The signal at CLK output has a nominal 50% duty cycle.
If the bit CLK_EN in control register 3 is set to 0, the clock is disabled permanently.
If the bit CLK_EN is set to 1 and bit CLK_ON (control register 3) is set to 0, the clock is disabled
as well. If bit CLK_ON is set to 1 and thus the clock is enabled if the Bit-check is ok (RX, RX Poll-
ing, FD mode (Slave)), an event on pin N_PWR_ON occurs or the bit Power_On in the status
register is 1.
f
FS
CLK
1
0
0
RF
=
f
f
---------- -
13.41180
13.25311
XTO
12.73193
XTO
3
(MHz)
f
f
f
XTO
XTO
XTO
V
DVCC
f
= 1.6V (typ)
RF
24 5
64 5
32 5
= f
TX_ASK
+
+
+
FREQ
--------------------------------- -
FREQ
--------------------------------- -
FREQ
--------------------------------- -
16384
16384
16384
= f
RX
+
+
+
24,5
24,5
24,5
f
f
TX_FSK_L(FD)
18.65 kHz
19.64 kHz
19.41 kHz
TX_FSK_L
f
f
f
RF
RF
RF
-
-
-
=
18.65 kHz
19.64 kHz
19.41 kHz
f
TX_FSK_H
CLK
f
f
f
RF
RF
RF
, as well as to the harmonics
+
+
+
f
208.23 kHz
206.26 kHz
203.74 kHz
TX_FSK_H(FD)
f
f
f
RF
RF
RF
+
+
+
CLK
4829D–RKE–06/06
is calculated
Resolution
Frequency
777.1 Hz
818.6 Hz
808.9 Hz