LH28F800SGHE-L70 Sharp Electronics, LH28F800SGHE-L70 Datasheet - Page 22

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LH28F800SGHE-L70

Manufacturer Part Number
LH28F800SGHE-L70
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F800SGHE-L70

Cell Type
NOR
Density
8Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7/3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Word Size
16b
Number Of Words
512K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F800SGHE-L70
Manufacturer:
UMC
Quantity:
20
FULL STATUS CHECK PROCEDURE
Block/Device Address
Block/Device Address
Read Status Register
Data (See Above)
Check if Desired
Write 01H/F1H,
Status Register
Set Lock-Bit
Set Lock-Bit
Successful
Write 60H,
Full Status
Complete
SR.4, 5 =
SR.7 =
SR.3 =
SR.1 =
SR.4 =
Read
Start
0
0
0
0
1
0
1
1
1
1
Fig. 7 Set Block and Permanent Lock-Bit Flowchart
Command Sequence
Device Protect Error
V
PP
Set Lock-Bit
Range Error
Error
Error
OPERATION COMMAND
Standby
Standby
Standby
Standby
- 22 -
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple lock-bits are
set before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
OPERATION
Write
Write
Read
Standby
BUS
Repeat for subsequent lock-bit set operations.
Full status check can be done after each lock-bit set
operation or after a sequence of lock-bit set operations.
Write FFH after the last lock-bit set operation to place device
in read array mode.
BUS
Block or Permanent
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
Block/Permanent
COMMAND
Lock-Bit
Lock-Bit
Confirm
Setup
Set
Set
Check SR.3
1 = V
Check SR.1
1 = Device Protect Detect
RP# = V
WP# = V
Permanent Lock-Bit is Set
Check SR.4, 5
Both 1 = Command Sequence Error
Check SR.4
1 = Set Lock-Bit Error
(Set Permanent Lock-Bit Operation)
(Set Block Lock-Bit Operation)
PP
Data = 60H
Addr = Block Address (Block),
Data = 01H (Block),
Addr = Block Address (Block),
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
Error Detect
IH
IL
and RP# = V
COMMENTS
Device Address (Parmanent)
F1H (Parmanent)
Device Address (Parmanent)
COMMENTS
IH
or

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