LH28F800SGHE-L70 Sharp Electronics, LH28F800SGHE-L70 Datasheet - Page 14

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LH28F800SGHE-L70

Manufacturer Part Number
LH28F800SGHE-L70
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F800SGHE-L70

Cell Type
NOR
Density
8Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7/3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Word Size
16b
Number Of Words
512K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
LH28F800SGHE-L70
Manufacturer:
UMC
Quantity:
20
At this point, a Read Array command can be
written to read data from blocks other than that
which is suspended. A Word Write command
sequence can also be issued during erase suspend
to program data in other blocks. Using the Word
Write Suspend command (see Section 4.8), a
word write operation can also be suspended.
During a word write operation with block erase
suspended, status register bit SR.7 will return to "0"
and the RY/BY# output will transition to V
However, SR.6 will remain "1" to indicate block
erase suspend status.
The only other valid commands while block erase is
suspended are Read Status Register and Block
Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM
will continue the block erase process. Status
register bits SR.6 and SR.7 will automatically clear
and RY/BY# will return to V
Resume
automatically outputs status register data when
read (see Fig. 5). V
(the same V
block erase is suspended. RP# must also remain at
V
erase). WP# must also remain at V
same WP# level used for block erase). Block erase
cannot resume until word write operations initiated
during block erase suspend have completed.
4.8 Word Write Suspend Command
The Word Write Suspend command allows word
write interruption to read data in other flash memory
locations. Once the word write process starts,
writing the Word Write Suspend command requests
that the WSM suspend the word write sequence at
a predetermined point in the algorithm. The device
continues to output status register data when read
after the Word Write Suspend command is written.
Polling status register bits SR.7 and SR.2 can
determine when the word write operation has been
suspended (both will be set to "1"). RY/BY# will
IH
or V
HH
command
(the same RP# level used for block
PP
level used for block erase) while
PP
is
must remain at V
written,
OL
. After the Erase
IL
the
or V
PPH1/2/3
device
IH
(the
OL
- 14 -
.
also transition to V
the word write suspend latency.
At this point, a Read Array command can be
written to read data from locations other than that
which is suspended. The only other valid
commands while word write is suspended are Read
Status Register and Word Write Resume. After
Word Write Resume command is written to the
flash memory, the WSM will continue the word
write process. Status register bits SR.2 and SR.7
will automatically clear and RY/BY# will return to
V
written, the device automatically outputs status
register data when read (see Fig. 6). V
remain at V
word write) while in word write suspend mode. RP#
must also remain at V
level used for word write). WP# must also remain
at V
write).
4.9 Set Block and Permanent Lock-
The combination of the software command
sequence and hardware WP#, RP# pin provides
most flexible block lock (write protection) capability.
The word write/block erase operation is restricted
by the status of block lock-bit, WP# pin, RP# pin
and permanent lock-bit. The status of WP# pin,
RP# pin and permanent lock-bit restricts the set
block bit. When the permanent lock-bit has not
been set, and when WP# = V
block lock bit can be set with the status of the RP#
pin. When RP# = V
be set with the permanent lock-bit set command.
After the permanent lock-bit has been set, the
write/erase operation to the block lock-bit can never
be accepted. Refer to Table 5 for the hardware
and the software write protection.
Set block lock-bit and permanent lock-bit are
executed by a two-cycle command sequence. The
OL
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
. After the Word Write Resume command is
IL
or V
Bit Commands
IH
PPH1/2/3
(the same WP# level used for word
OH
HH
(the same V
. Specification t
, the permanent lock-bit can
IH
or V
IH
HH
or RP# = V
PP
(the same RP#
WHRH1
level used for
PP
defines
HH
must
, the

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