AM29DL323GT90WMI AMD (ADVANCED MICRO DEVICES), AM29DL323GT90WMI Datasheet - Page 90

• Manufacturer Part Number: AM29DL323GT90WMI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29DL323GT90WMI

• Lead Free Status / Rohs Status: Not Compliant

Note:
array data read cycle
Notes:
1. VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last
2. S29PL129J - During CE1# transitions, CE2# = V
3. S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2#
90
status read cycle, and array data read cycle
Addresses
DQ6/DQ2
Addresses
RY/BY#
DQ6–DQ0
VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and
RY/BY#
CE#
WE#
OE#
WE#
DQ7
OE#
CE#
Valid Data
t
t
BUSY
CH
Figure 18. Data# Polling Timings (During Embedded Algorithms)
t
DH
t
Figure 19. Toggle Bit Timings (During Embedded Algorithms)
OEH
t
OEH
t
ACC
t
CE
t
VA
t
RC
OE
(first read)
S29PL127J/S29PL129J/S29PL064J/S29PL032J
Status
Valid
Complement
Status Data
t
OEPH
t
OH
t
DF
IH
t
AHT
; During CE2# transitions, CE1# = V
P R E L I M I N A R Y
t
OE
(second read)
t
ASO
Status
Valid
VA
Complement
Status Data
t
CEPH
t
t
AHT
AS
True
True
(stops toggling)
Status
Valid
IH
VA
Valid Data
Valid Data
31107A5 March 15, 2004
Valid Data
High Z
High Z