AM29DL323GT90WMI AMD (ADVANCED MICRO DEVICES), AM29DL323GT90WMI Datasheet - Page 3

• Manufacturer Part Number: AM29DL323GT90WMI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29DL323GT90WMI

• Lead Free Status / Rohs Status: Not Compliant

General Description
March 15, 2004 31107A5
Bank
Bank
1A
1B
2A
2B
D
A
B
C
Simultaneous Read/Write Operation with Zero Latency
Page Mode Features
16 Mbit (4 Kw x 8 and 32 Kw x 31)
16 Mbit (4 Kw x 8 and 32 Kw x 31)
48 Mbit (32 Kw x 96)
48 Mbit (32 Kw x 96)
The PL127J/PL129J/PL064J/PL032J is a 128/128/64/32 Mbit, 3.0 volt-only Page
Mode and Simultaneous Read/Write Flash memory device organized as 8/8/4/2
Mwords. The devices are offered in the following packages:
The word-wide data (x16) appears on DQ15-DQ0. This device can be pro-
grammed in-system or in standard EPROM programmers. A 12.0 V V
required for write or erase operations.
The device offers fast page access times of 20 to 30 ns, with corresponding ran-
dom access times of 55 to 70 ns, respectively, allowing high speed
microprocessors to operate without wait states. To eliminate bus contention the
device has separate chip enable (CE#), write enable (WE#) and output enable
(OE#) controls. Note: Device PL129J has 2 chip enable inputs (CE1#, CE2#).
The Simultaneous Read/Write architecture provides simultaneous operation
by dividing the memory space into 4 banks, which can be considered to be four
separate memory arrays as far as certain operations are concerned. The device
can improve overall system performance by allowing a host system to program
or erase in one bank, then immediately and simultaneously read from another
bank with zero latency (with two simultaneous operations operating at any one
time). This releases the system from waiting for the completion of a program or
erase operation, greatly improving system performance.
The device can be organized in both top and bottom sector configurations. The
banks are organized as follows:
The page size is 8 words. After initial page access is accomplished, the page mode
operation provides fast read access speed of random locations within that page.
16 Mbit (4 Kw x 8 and 32 Kw x 31)
16 Mbit (4 Kw x 8 and 32 Kw x 31)
PL127J Sectors
11mm x 8mm, 64-ball Fine-pitch BGA standalone (all)
9mm x 8mm, 80-ball Fine-pitch BGA standalone (PL127J and PL129J)
8mm
(PL127J/PL129J)
48 Mbit (32 Kw x 96)
48 Mbit (32 Kw x 96)
x
PL129J Sectors
11.6mm,
P R E L I M I N A R Y
S29PL127J/S29PL129J/S29PL064J/S29PL032J
64-ball
8 Mbit (4 Kw x 8 and 32 Kw x 15)
8 Mbit (4 Kw x 8 and 32 Kw x 15)
24 Mbit (32 Kw x 48)
24 Mbit (32 Kw x 48)
Fine
PL064J Sectors
pitch
BGA
multi-chip
4 Mbit (4 Kw x 8 and 32 Kw x 7)
4 Mbit (4 Kw x 8 and 32 Kw x 7)
CE# Control
CE1#
CE1#
CE2#
CE2#
12 Mbit (32 Kw x 24)
12 Mbit (32 Kw x 24)
compatible
PP
PL032J Sectors
is not
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