SL811HST Cypress Semiconductor Corp, SL811HST Datasheet - Page 23

SL811HST

Manufacturer Part Number
SL811HST
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of SL811HST

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
PLCC
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

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Table 4-2. SL811HST-AC Pin Assignments and Definitions (continued)
Notes:
4.2.4
Document 38-08008 Rev. *B
12. The A0 Address bit is used to access address register or data registers in I/O Mapped or Memory Mapped applications.
Pin No.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Package Markings (SL811HST-AC)
YYWW = Date code
XXXX = Product code
X.X = Silicon revision number
Pin Type
BIDIR
BIDIR
VDD
OUT
NC
NC
NC
NC
NC
NC
NC
NC
IN
IN
IN
IN
Pin Name
+3.3 VDC
nDACK
nDRQ
nRD
M/S
NC
NC
NC
NC
NC
NC
NC
NC
D6
D7
A0
Data 6. Microprocessor Data/(Address) Bus.
NC
NC
NC
NC
NC
Data 7. Microprocessor Data/(Address) Bus.
Master/Slave Mode Select. “1” selects Slave. “0” = Master.
SL811HST-AC Device V
register.
DMA Acknowledge. An active LOW input used to interface to an external
DMA controller. DMA is enabled only in slave mode. In host mode, pin
should be tied HIGH (logic “1”).
DMA Request. An active LOW output used with an external DMA
controller. nDRQ and nDACK form the handshake for DMA data transfers.
In host mode, pin must be left unconnected.
Read Strobe Input. An active LOW input used with nCS to Read
registers/data memory.
NC
NC
NC
A0 = “0.” Selects address pointer. Reg.A0 = “1.” Selects data buffer or
YYWW-X.X
XXXX
SL811HST
[12]
DD
Pin Description
Power.
SL811HS
Page 23 of 32
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