SL811HST Cypress Semiconductor Corp, SL811HST Datasheet - Page 19

• Manufacturer Part Number: SL811HST
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL811HST

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

4.1.3
The SL811HS package is a 28-pin PLCC. The device requires 3.3 VDC. Average typical current consumption is less then 20 mA
for 3.3V.
Table 4-1. SL811HS Pin Assignments and Definitions
Notes:
Document 38-08008 Rev. *B
4.
5.
6.
7.
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
The A0 Address bit is used to access address or data registers in I/O-mapped or memory-mapped applications.
The CM Clock Multiplier pin should be tied HIGH for a 12-MHz clock source and tied to ground for a 48-MHz clock source. In SL11H, this pin was designated
as an ALE input pin.
V
Ltd. 3.3V SMD regulator (part number XC62HR3302MR).
The X1/X2 clock requires external 12- or 48-MHz matching crystal or clock source.
1
2
3
4
5
6
7
8
9
DD
can be derived from the USB supply. The diagram below shows a simple method to provide 3.3V/30 mA. Another option is to use a Torex Semiconductor,
SL811HS USB Host/Slave Pin Description
Pin Type
VDD1
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
BIDIR
GND
GND
GND
OUT
VDD
OUT
OUT
VDD
IN
IN
IN
IN
IN
IN
IN
IN
IN
Pin Name
USB GND
+3.3 VDC
+3.3 VDC
+3.3 VDC
CLK/X1
nDACK
DATA +
DATA -
INTRQ
nDRQ
nRST
nWR
GND
GND
nRD
nCS
M/S
CM
A0
X2
D0
D1
D2
D3
D4
D5
D6
D7
A0 = “0.” Selects Address Pointer. Reg. Write Only. Selects Data Buffer or Register.
R/W.
DMA Acknowledge. An active LOW input used to interface to an external DMA
controller. This works only in slave mode. In host mode, pin should be tied to Logic “1”
in Host Mode.
DMA Request. An active LOW output used with an external DMA controller. nDRQ and
nDACK form the handshake for DMA data transfers. In host mode, pin must be left
unconnected in Host Mode.
Read Strobe Input. An active LOW input used with nCS to Read registers/data memory.
Write Strobe Input. An active LOW input used with nCS to Write to registers/data
memory.
Active LOW Chip Select. Used with nRD and nWD when accessing SL811HS.
Clock Multiply. Select Internal 4 X Clock Multiplier. “1” enables 4X clock multiplier. “0”
Disables.
Power for USB Transceivers.
USB Differential Data Signal HIGH Side.
USB Differential Data Signal LOW Side.
Ground Connection for USB.
SL811HS Device V
12-/48-MHz Clock or External Crystal X1 Connection
External Crystal X2 Connection.
SL811HS Device Active LOW Reset Input.
Active HIGH Interrupt Request Output to External Controller.
SL811HS Device Ground.
Data 0. Microprocessor Data/(Address) Bus.
Data 1. Microprocessor Data/(Address) Bus.
Data 2. Microprocessor Data/(Address) Bus.
Data 3. Microprocessor Data/(Address) Bus.
SL811HS Device Ground.
Data 4. Microprocessor Data/(Address) Bus.
Data 5. Microprocessor Data/(Address) Bus.
Data 6. Microprocessor Data/(Address) Bus.
Data 7. Microprocessor Data/(Address) Bus.
Master/Slave Select. Host = “0,” Slave = “1”.
SL811HS Device V
[4]
[5]
DD
DD
Power
Power.
[6]
Pin Description
[7]
SL811HS
Page 19 of 32
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