SSTUB32S869BHLF IDT, Integrated Device Technology Inc, SSTUB32S869BHLF Datasheet - Page 14

• Manufacturer Part Number: SSTUB32S869BHLF
• Description: IC REGIST BUFF 14BIT DDR2 150BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Bufferr

Specifications of SSTUB32S869BHLF

• Tx/rx Type: LVCMOS
• Delay Time: 3.0ns
• Capacitance - Input: 3.5pF
• Voltage - Supply: 1.7 V ~ 1.9 V
• Mounting Type: Surface Mount
• Package / Case: *
• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Bits: 14
• Number Of Inputs: 14
• Number Of Outputs: 28
• High Level Output Current: -16mA
• Low Level Output Current: 16mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 340(Min)MHz
• Mounting: Surface Mount
• Pin Count: 150
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant

1203—04/11/06
Output slew rate measurement information (V
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz;
Z
(1) C
(1) C
o
= 50 ; input slew rate = 1 V/ns ± 20%, unless otherwise specified.
L
L
includes probe and jig capacitance.
includes probe and jig capacitance.
Figure 13 — Voltage waveforms, HIGH-to-LOW slew rate measurement
Figure 15 — Voltage waveforms, LOW-to-HIGH slew rate measurement
Figure 12 — Load circuit, HIGH-to-LOW slew measurement
Figure 14 — Load circuit, LOW-to-HIGH slew measurement
OUTPUT
OUTPUT
dv_r
DUT
DUT
dv_f
OUT
OUT
14
SEE NOTE (1)
DD
C L = 10 pF
20%
dt_r
= 1.8 V ± 0.1 V)
SEE NOTE (1)
C L = 10 pF
80%
dt_f
80%
20%
V DD
ICSSSTUB32S869B
R L = 50Ω
TEST POINT
TEST POINT
R L = 50Ω
Advance Information
002aaa377
002aaa379
002aaa378
002aaa380
V OH
V OL
V OL
V OH