SSTUB32S869BHLF IDT, Integrated Device Technology Inc, SSTUB32S869BHLF Datasheet - Page 12

• Manufacturer Part Number: SSTUB32S869BHLF
• Description: IC REGIST BUFF 14BIT DDR2 150BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Bufferr

Specifications of SSTUB32S869BHLF

• Tx/rx Type: LVCMOS
• Delay Time: 3.0ns
• Capacitance - Input: 3.5pF
• Voltage - Supply: 1.7 V ~ 1.9 V
• Mounting Type: Surface Mount
• Package / Case: *
• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Bits: 14
• Number Of Inputs: 14
• Number Of Outputs: 28
• High Level Output Current: -16mA
• Low Level Output Current: 16mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 340(Min)MHz
• Mounting: Surface Mount
• Pin Count: 150
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant

1203—04/11/06
(over recommended operating free-air temperature range, unless otherwise noted)
Notes:
(over recommended operating free-air temperature range, unless otherwise noted)
1. Guaranteed by design, not 100% tested in production.
Timing Requirements
SYMBOL
Switching Characteristics
Symbol
t
t
fmax
f
PDMSS
INACT
t
t
t
t
clock
PDM
t
t
ACT
PHL
PLH
t
t
LH
HL
S
H
Clock frequency
Differential inputs active time
Differential inputs inactive time
Setup time
Hold time
Hold time
1 - Guaranteed by design, not 100% tested in production.
2 - For data signal input slew rate of 1V/ns.
3 - For data signal input slew rate of 0.5V/ns and < 1V/ns.
4 - CLK/CLK# signal input slew rate of 1V/ns.
Max input clock frequency
Propagation delay, single
bit switching
Low to High propagation
delay
High to low propagation
delay
Propagation delay
simultaneous switching
High to low propagation
delay
Low to High propagation
delay
Parameter
PARAMETERS
CK↑ to CK#↓ QN
CK↑ to CK#↓ to
PTYERR#
CK↑ to CK#↓ to
PTYERR#
CK↑ to CK#↓ QN
RESET# ↓ to QN↓
RESET# ↓ to
PTYERR1#↑
Data before CLK↑, CLK#↓
DCS0 before CLK↑, CLK#↓,
CSR# high
DCS#, DODT, DCKE and Q
after CK↑, CK#↓
PARIN1 after CK↑, CK#↓
Measurement
Conditions
12
MIN
340
1.2
1.2
1
V
MAX
ICSSSTUB32S869B
1.9
DD
Advance Information
0.7
0.5
MIN
3
3
2
3
3
0.5
0.7
= 1.8V ±0.1V
Units
MHz
ns
ns
ns
ns
ns
ns
MAX
340
10
15
UNITS
MHz
ns
ns
ns
ns
ns