CY8C9520A-24PVXI Cypress Semiconductor Corp, CY8C9520A-24PVXI Datasheet - Page 14

• Manufacturer Part Number: CY8C9520A-24PVXI
• Description: IC I/O EXPANDER I2C 20B 28SSOP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C9520A-24PVXI

• Package / Case: 28-SSOP
• Interface: I²C
• Number Of I /o: 20
• Interrupt Output: Yes
• Frequency - Clock: 100KHz
• Voltage - Supply: 3 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: EEPROM, POR, PWM, WDT
• Processor Series: CY8C95x0A
• Core: M8C
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 20
• Operating Supply Voltage: 3 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3242-IOX, CY3242-IOXLite
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Program Memory Type: EEPROM
• Program Memory Size: 32 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-2023 - KIT EVAL PSOC I2C PORT EXP428-1911 - KIT EVAL PSOC I2C PORT EXP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2015-5

Watchdog Register (2Fh)
This register controls the internal Watchdog timer. This timer can
trigger a device reset if the device is not responding to I
requests due to misconfiguration. Device operation is not
affected when the Watchdog register = 0. If the I
any non zero value to the Watchdog register, the countdown
mechanism is activated and each second the register is decre-
mented. Upon transition from 1 to 0, the device is rebooted,
which restores user defaults. After reboot, the Watchdog register
value is reset to zero. Any I
Expander) resets the Watchdog register to the previously stored
value. Any device reboot (caused by a POR or Watchdog) sets
the Watchdog register to zero (turns off the Watchdog feature).
The Watchdog timer can be disabled by writing zero to the
Watchdog register (2Fh) or by using the Reconfigure Device
Cmd (07h).
Note The Watchdog timer is not intended to track precise time
intervals. The timer's frequency can vary in range between -50%
on up to +100%. This variation must be taken into account when
selecting the appropriate value for the Watchdog register.
Command Register (30h)
This register sends commands to the device, including current
configuration as new POR defaults, restore factory defaults,
define POR defaults, read POR defaults, write device configu-
ration, read device configuration, and reconfigure device with
stored POR defaults. The command set is presented in
Note Registers are not restored in parallel. Do not assume any
particular order to the restoration process.
Table 15. Available Commands
Commands Description
Store Config to E
The current ports settings (drive modes and output data) and
other configuration registers are saved in the EEPROM by using
the store configuration command (Cmd). These settings are
automatically loaded after the next device power up or if the 07h
command is issued.
Restore Factory Defaults Cmd (02h)
This command replaces the saved user configuration with the
factory default configuration. Current settings are unaffected by
this command. New settings are loaded after the next device
power up or if the 07h command is issued.
Document Number: 38-12036 Rev. *E
01h
02h
03h
04h
05h
06h
07h
Command
Store device configuration to EEPROM POR
defaults
Restore Factory Defaults
Write EEPROM POR defaults
Read EEPROM POR defaults
Write device configuration
Read device configuration
Reconfigure device with stored POR defaults
2
POR Defaults Cmd (01h)
2
Description
C transaction (addressing the
2
C master writes
Table
15.
2
C
Write E
This command sends new power up defaults to the CY8C95xx
without changing current settings unless the 07h command is
issued afterwards. This command is followed by 147 data bytes
according to
146 data bytes (00h-91h). If the CRC check fails or an incom-
plete block is sent, then the slave responds with a NAK and the
data does not get saved to EEPROM.
To define new POR defaults the user must:
■
■
■
Content of the data block is described in
Table 16. POR Defaults Data Structure
00h – 07h
08h – 0Fh
10h – 17h
18h – 1Fh
20h – 27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh – 35h
36h – 3Ch
3Dh – 43h
44h – 4Ah
4Bh – 51h
52h – 58h
59h – 5Fh
60h
61h
62h
63h – 65h
…
8Dh – 8Fh
90h
91h
92h
Write command 03h
Write 146 data bytes with new values of registers
Write 1 CRC byte calculated as XOR of previous 146 data
bytes.
Offset
2
POR Defaults Cmd (03h)
Table
Resistive pull down Drive Mode Port 0
Open drain high Drive Mode Port 0
Open drain low Drive Mode Port 0
Strong drive Drive Mode Port 0
Slow strong drive Drive Mode Port 0
High impedance Drive Mode Port 0
Config setting PWM0
Period setting PWM0
Pulse Width setting PWM0
…
Divider
Enable
CRC
Output Port 0-7
Interrupt mask Port 0-7
Select PWM Port 0-7
Inversion Port 0-7
Pin Direction Port 0-7
Resistive pull up Drive Mode Port 0
Drive Modes Port 1
Drive Modes Port 2
Drive Modes Port 3
Drive Modes Port 4
Drive Modes Port 5
Drive Modes Port 6
Drive Modes Port 7
PWM1 settings
PWM15 settings
16. The CRC is calculated as the XOR of the
CY8C9540A, CY8C9560A
Value
Table
CY8C9520A
Page 14 of 32
16.
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