TP3410J National Semiconductor, TP3410J Datasheet - Page 23

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TP3410J

Manufacturer Part Number
TP3410J
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of TP3410J

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant

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Functional Description
FA0
SEI
DC
11 3 Activation Indication Register (READ ONLY)
Activation Indicators are coded the same as for the Activa-
tion Control Register In Microwire mode only at each acti-
vation status change the four significant bits in this register
are sent to the Interrupt stack If multiple interrupt conditions
should arise simultaneously this register has the highest
priority and will be read first
11 4 Activation Status Indicators
DP LSD When the TP3410 is deactivated either powered
SYNC
AP
AI
EI
7
0
6
0
up or powered down the Line Signal Detector
sets this indicator if it detects an incoming 10 kHz
wake-up tone If the device is powered down the
LSD pin is also pulled low In NT mode only this
code also functions as a Deactivation Pending in-
dicator when ‘‘dea’’
In LT mode only this indicates when superframe
sync is detected and should be used to stop the
external default timer
Activation Pending which is used in NT mode to
indicate when superframe sync has been acquired
and the BCLK and FS outputs are synchronized to
the received line signal In LT mode the Line Sig-
nal Detector sets this indicator if it detects an in-
coming 10 kHz wake-up tone
This Activation Indication code indicates that the
loop is fully activated (‘‘act’’
ceived) and the 2B
data transfer In LT mode however if Breakpoint
to AI with an AC command This will cause the
device to set ‘‘act’’
open the 2B
This command may be used on a fully activated
line to force the transmit ‘‘act’’ bit
loss or denial of 2B
(LT state J7) To revert back to sending ‘‘act’’
use the AC command (with BP2
S-Interface Error Indication which should only be
used in an NT-1 when loss of received signal is
detected (i e INFO 0) This command forces the
upstream ‘‘act’’ bit (M41)
Deactivation Confirmation This command may be
used as an alternative to PDN to power-down the
device in response to a DI indication It should not
be used prior to the DI indication
Loss of frame synchronization will set this Error
Indicator and inhibit the 2B
received line signal can still be detected the de-
vice will attempt to recover synchronization for up
to 480 ms if this fails it will enter the RESET state
and generate a DI The EI indication is also gener-
ated on an activated line if the received ‘‘act’’ bit
changes from 1 to 0 indicating loss of tranparen-
cy at the far-end
2 is enabled via CR2 it is necessary to respond
5
0
a
4
0
D channels for data transfer
Byte 2
e
C4
e
a
3
a
1 in the transmit frame and
0 is validated
D channels are enabled for
D transparency to the NT
e
a
C3
2
(Continued)
0
D channel data If a
e
e
e
1 has been re-
C2
1)
1
0 to indicate
C1
0
e
1
23
DI
TIM
11 5 Cold Start and Warm Start
When power is first applied to the device the first AR com-
mand will always initiate a cold-start sequence which may
take up to 15 seconds for complete activation If the device
is subsequently deactivated using the correct procedure
and provided power is maintained uninterrupted in either the
power-up or power-down state the next AR instruction au-
tomatically sequences through the warm-start procedure
which normally achieves complete loop activation within
300 ms
The device includes the specified timers of 15s 480 ms and
40 ms at the appropriate phases of the activation and deac-
tivation sequences For applications requiring a default time-
out other than 15s the internal timer can be disabled to
allow an external timer to be used
11 6 LT Mode Activation Deactivation
If activation is initiated by the downstream (NT mode) end
with the device either powered up or down an AP Interrupt
condition will be generated on detection of the 10 kHz
‘‘wake-up’’ tone The Activation Indication Register will
show this condition and if the device is powered down the
LSD pin will be pulled low
Prior to initiating activation all registers must be pro-
grammed appropriately and the device must then be pow-
ered up The use of the commands and status indicators is
the same whether activation is initiated locally or from the
remote end An AR command is required to enable the de-
vice to proceed with the activation sequence An internal
15s default timer is also started (in North America the timer
value should be 15 seconds if a single loop section is being
activated) Please see TP3410 User’s Manual for additional
information on activation and deactivation
The sequence continues automatically until superframe syn-
chronization is acquired on the SN3 signal received from the
NT At this point the ‘‘act’’ bit is set
direction and the AI Interrupt is generated in the Activation
Indication Register The loop is then fully activated with all
channels in the data stream available for use
If activation is not successfully completed before expiry of
the 15s timer the device generates an EI followed by a DI
fault indication and ensures that the Activation Sequencer
returns to the Full Reset state (J10 to J1) prior to any re-
attempt to activate
For additional control over the activation sequence a break-
point state may be enabled at the LT BP2 will halt the
sequence when the loop is fully synchronized receiving
SN3 but the ‘‘act’’ bit is held
S T Interface from becoming fully activated (the NT1 will
maintain INFO2 towards the TEs) An AC command will re-
lease this state allowing activation to be completed The
BP2 bit in Register CR2 controls the enabling of this break-
point
The Deactivated Indication which confirms that
the loop has been deactivated by means of a De-
activate Request at the LT and has entered the
RESET state DI is effective in GCI mode only
In GCI mode only TIM is an acknowledgment
when the device is in the power-down state and
receives a PUP command
e
0 this state prevents the
e
1 in the downstream

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