PIC18F4620-I/P Microchip Technology Inc., PIC18F4620-I/P Datasheet - Page 162

• Manufacturer Part Number: PIC18F4620-I/P
• Description: 40 Pin, 64 KB Flash, 3968 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4620-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 36
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 64K Bytes
• Ram Size: 4K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2525/2620/4525/4620
TABLE 16-3:
DS39626B-page 160
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISB
TRISC
TRISD
TMR1L
TMR1H
T1CON
TMR2
T2CON
PR2
TMR3L
TMR3H
T3CON
CCPR1L
CCPR1H
CCP1CON
ECCP1AS
PWM1CON
Legend:
Note 1:
Name
2:
— = unimplemented, read as ‘0’. Shaded cells are not used during ECCP operation.
The SBOREN bit is only available when the BOREN1:BOREN0 configuration bits = 01; otherwise, it is disabled
and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
These bits are unimplemented on 28-pin devices; always maintain these bits clear.
PORTB Data Direction Control Register
PORTC Data Direction Control Register
PORTD Data Direction Control Register
Timer1 Register Low Byte
Timer1 Register High Byte
Timer2 Register
Timer2 Period Register
Timer3 Register Low Byte
Timer3 Register High Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
ECCPASE ECCPAS2
GIE/GIEH PEIE/GIEL
PSPIE
PSPIP
PSPIF
OSCFIF
OSCFIE
OSCFIP
P1M1
PRSEN
RD16
RD16
IPEN
Bit 7
—
REGISTERS ASSOCIATED WITH ECCP1 MODULE AND TIMER1 TO TIMER3
(2)
(2)
(2)
(2)
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
T3CCP2
P1M0
PDC6
T1RUN
CMIE
CMIP
CMIF
ADIF
ADIE
ADIP
Bit 6
(2)
(2)
(1)
ECCPAS1
T1CKPS1
T3CKPS1
TMR0IE
PDC5
DC1B1
RCIF
RCIE
RCIP
Bit 5
—
—
—
—
(2)
ECCPAS0
T1CKPS0
T3CKPS0
Preliminary
PDC4
INT0IE
DC1B0
TXIE
TXIP
EEIF
EEIE
EEIP
Bit 4
TXIF
RI
(2)
T1OSCEN
CCP1M3
T3CCP1
PSSAC1
PDC3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
TO
(2)
T1SYNC
T3SYNC
CCP1M2
PSSAC0
TMR0IF
CCP1IE
CCP1IP
CCP1IF
HLVDIF
HLVDIE
HLVDIP
PDC2
Bit 2
PD
(2)
PSSBD1
TMR1CS
TMR3CS
CCP1M1
TMR2IE
TMR2IP
TMR3IE
TMR3IP
 2004 Microchip Technology Inc.
TMR2IF
TMR3IF
PDC1
INT0IF
Bit 1
POR
(2)
(2)
PSSBD0
TMR1ON
TMR3ON
CCP1M0
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
PDC0
RBIF
Bit 0
BOR
(2)
(2)
on page
Values
Reset
49
48
52
52
52
52
52
52
52
52
52
50
50
50
50
50
50
51
51
51
51
51
51
51
51