DP83905AVQB National Semiconductor, DP83905AVQB Datasheet - Page 45

• Manufacturer Part Number: DP83905AVQB
• Description: IC CONTROLR AT/LAN TP IN 160PQFP
• Manufacturer: National Semiconductor
• Series: AT/LANTIC™r

Specifications of DP83905AVQB

• Controller Type: AT, LAN Twisted-Pair Interface Controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP83905AVQB

6 0 Operation of AT LANTIC Controller
6 3 PACKET RECEPTION
The Local DMA receive channel uses a Buffer Ring Struc-
ture comprised of a series of contiguous fixed length 256
byte (128 word) buffers for storage of received packets The
location of the Receive Buffer Ring is programmed in two
registers a Page Start and a Page Stop Register Ethernet
packets consist of a distribution of shorter link control pack-
ets and longer data packets the 256 byte buffer length pro-
vides a good compromise between short packets and long-
er packets to most efficiently use memory In addition these
buffers provide memory resources for storage of back-to-
back packets in loaded networks The assignment of buffers
for storing packets is controlled by Buffer Management Log-
ic in the AT LANTIC Controller The Buffer Management
Logic provides three basic functions linking receive buffers
for long packets recovery of buffers when a packet is re-
jected and recirculation of buffer pages that have been
read by the host
At initialization a portion of the 64 kbyte (or 32 kword) ad-
dress space is reserved for the receive buffer ring Two
eight bit registers
(PSTART) and the Page Stop Address Register (PSTOP)
define the physical boundaries of where the buffers reside
The AT LANTIC Controller treats the list of buffers as a
logical ring whenever the DMA address reaches the Page
Stop Address the DMA is reset to the Page Start Address
the Page Start Address Register
FIGURE 28 AT LANTIC Controller Receiver Buffer Ring
45
(Continued)
Initialization of the Buffer Ring
Two static registers and two working registers control the
operation of the Buffer Ring These are the Page Start Reg-
ister Page Stop Register (both described previously) the
Current Page Register and the Boundary Pointer Register
The Current Page Register points to the first buffer used to
store a packet and is used to restore the DMA for writing
status to the Buffer Ring or for restoring the DMA address in
the event of a Runt packet a CRC or Frame Alignment
error The Boundary Register points to the first packet in the
FIGURE 29 Buffer Ring at Initialization
TL F 11498 – 25
TL F 11498 – 26