DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 9

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.2
Freescale Semiconductor
Power Name
V
V
V
V
V
V
CCQH
CCQL
CCD
CCC
CCA
CCS
V
V
Power
CCP
CCH
(3)
(2)
(4)
(2)
(4)
(3)
PLL Power—V
input should be provided with an extremely low impedance path to the V
V
Quiet Core (Low) Power—V
be tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four V
Quiet External (High) Power—V
externally to all other chip power inputs. The user must provide adequate decoupling capacitors.
There are three V
Address Bus Power—V
input must be tied externally to all other chip power inputs. The user must provide adequate external
decoupling capacitors. There are three V
Data Bus Power—V
be tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four V
Bus Control Power—V
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are two V
Host Power—V
to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There is one V
SHI, ESAI, DAX, and Timer Power—V
I/O drivers. This input must be tied externally to all other chip power inputs. The user must provide
adequate external decoupling capacitors. There are two V
CCP
input.
CCH
CCP
CCH
CCQH
input.
is V
is an isolated power for the HDI08 I/O drivers. This input must be tied externally
CCD
DSP56362 Technical Data, Rev. 4
CC
inputs.
CCC
Table 2-2 Power Inputs
CCA
is an isolated power for sections of the data bus I/O drivers. This input must
dedicated for PLL use. The voltage should be well-regulated and the
CCC
CCQ
CCD
is an isolated power for the bus control I/O drivers. This input must be
CCQL
is an isolated power for sections of the address bus I/O drivers. This
inputs.
inputs.
inputs.
CCQH
is an isolated power for the core processing logic. This input must
CCS
is a quiet power source for I/O lines. This input must be tied
CCA
Description
is an isolated power for the SHI, ESAI, DAX, and Timer
inputs.
CCS
inputs.
CC
power rail. There is one
Power
2-3