DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 16

IC DSP 24BIT AUD 120MHZ 144-LQFP

DSPB56362AG120

Manufacturer Part Number
DSPB56362AG120
Description
IC DSP 24BIT AUD 120MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56362AG120

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
120MHz
Non-volatile Memory
ROM (126 kB)
On-chip Ram
42kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Architecture
Modified Harvard
Format
Fixed Point
Clock Freq (max)
120MHz
Mips
120
Device Input Clock Speed
120MHz
Ram Size
42KB
Program Memory Size
90KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.14V
Operating Supply Voltage (max)
3.46V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Product
DSPs
Data Bus Width
24 bit
Processor Series
DSP563xx
Core
56000
Numeric And Arithmetic Format
Fixed-Point
Instruction Set Architecture
Modified Harvard
Device Million Instructions Per Second
120 MIPS
Maximum Clock Frequency
120 MHz
Program Memory Type
Flash
Data Ram Size
42 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SPI, I2C, ESAI, SHI
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Host Interface (HDI08)
2-10
Signal Name
HAD0–HAD7
PB0–PB7
HAS/HAS
H0–H7
HA0
PB8
HA1
HA8
PB9
Input, Output, or
Input, Output, or
Input, output, or
Disconnected
Disconnected
disconnected
Input/Output
Input/Output
Type
Input
Input
Input
Input
State during Reset
GPIO Disconnected Host Data—When the HDI08 is programmed to interface a
GPIO Disconnected Host Address Input 0—When the HDI08 is programmed to
GPIO Disconnected Host Address Input 1—When the HDI08 is programmed to
DSP56362 Technical Data, Rev. 4
Table 2-9 Host Interface
nonmultiplexed host bus and the HI function is selected, these
signals are lines 0–7 of the bidirectional, tri-state data bus.
Host Address—When HDI08 is programmed to interface a
multiplexed host bus and the HI function is selected, these
signals are lines 0–7 of the address/data bidirectional,
multiplexed, tri-state bus.
Port B 0–7—When the HDI08 is configured as GPIO, these
signals are individually programmable as input, output, or
internally disconnected.
The default state after reset for these signals is GPIO
disconnected.
This input is 5 V tolerant.
interface a nonmultiplexed host bus and the HI function is
selected, this signal is line 0 of the host address input bus.
Host Address Strobe—When HDI08 is programmed to
interface a multiplexed host bus and the HI function is selected,
this signal is the host address strobe (HAS) Schmitt-trigger input.
The polarity of the address strobe is programmable, but is
configured active-low (HAS) following reset.
Port B 8—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
interface a nonmultiplexed host bus and the HI function is
selected, this signal is line 1 of the host address (HA1) input bus.
Host Address 8—When HDI08 is programmed to interface a
multiplexed host bus and the HI function is selected, this signal
is line 8 of the host address (HA8) input bus.
Port B 9—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
Freescale Semiconductor

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