ADSP-21363KSWZ-1AA Analog Devices Inc, ADSP-21363KSWZ-1AA Datasheet - Page 41

• Manufacturer Part Number: ADSP-21363KSWZ-1AA
• Description: IC DSP 32BIT 333MHZ EPAD 144LQFP
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21363KSWZ-1AA

• Interface: DAI, SPI
• Clock Rate: 333MHz
• Non-volatile Memory: ROM (512 kB)
• On-chip Ram: 384kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
• No. Of Bits: 32 / 40
• Frequency: 333MHz
• Supply Voltage: 1.2V
• Supply Voltage Range: 1.14V To 1.26V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of Pins: 144
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI Interface—Slave
Table 40. SPI Interface Protocol—Slave Switching and Timing Specifications
1
Parameter
Timing Requirements
t
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
t
t
t
The timing for these parameters applies when the SPI is routed through the signal routing unit. For more information, refer to the ADSP-2136x SHARC Processor Hardware
SPICLKS
SPICHS
SPICLS
SDSCO
HDS
SSPIDS
HSPIDS
SDPPW
DSOE
DSOE
DSDHI
DSDHI
DDSPIDS
HDSPIDS
DSOV
Reference, “Serial Peripheral Interface Port” chapter.
1
1
Serial Clock Cycle
Serial Clock High Period
Serial Clock Low Period
SPIDS Assertion to First SPICLK Edge
CPHASE = 0
CPHASE = 1
Last SPICLK Edge to SPIDS Not Asserted, CPHASE = 0
Data Input Valid to SPICLK Edge (Data Input Setup Time)
SPICLK Last Sampling Edge to Data Input Not Valid
SPIDS Deassertion Pulse Width (CPHASE = 0)
SPIDS Assertion to Data Out Active
SPIDS Assertion to Data Out Active (SPI2)
SPIDS Deassertion to Data High Impedance
SPIDS Deassertion to Data High Impedance (SPI2)
SPICLK Edge to Data Out Valid (Data Out Delay Time)
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
SPIDS Assertion to Data Out Valid (CPHASE = 0)
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
Rev. G | Page 41 of 56 | March 2011
Min
4 × t
2 × t
2 × t
2 × t
2 × t
2 × t
2
2
2 × t
0
0
0
0
2 × t
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
– 2
– 2
– 2
K and B Grade
Max
5
8
5
8.6
9.5
5 × t
PCLK
Max
5
9
5.5
10
11.0
5 × t
Y Grade
PCLK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns